diff options
| author | Mathew King <mathewk@chromium.org> | 2019-10-14 11:37:12 -0600 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-12-02 23:24:08 +0000 |
| commit | 6f8f34f1bf91bd225b1dd9fe4dc70fdcf6ce2805 (patch) | |
| tree | 90c2215787cbaf2a5cba4341a757f7f4d42b635f | |
| parent | f9fa985242b0e4abb089931b7643db4e493bd86f (diff) | |
soc/intel/cannonlake: Add gfx.asl file
Add gfx.asl file for cannonlake SOCs to allow for graphics-related ACPI
devices and methods on cannonlake devices.
BUG=b:142237145
TEST=gfx.asl added to drallion dsdt.asl
Change-Id: I38a26f3135d571e2f9b63840d38fd4d3476fc142
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/gfx.asl | 20 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/southbridge.asl | 3 |
2 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/acpi/gfx.asl b/src/soc/intel/cannonlake/acpi/gfx.asl new file mode 100644 index 0000000000..d2678596c0 --- /dev/null +++ b/src/soc/intel/cannonlake/acpi/gfx.asl @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Google LLC + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +Device (GFX0) +{ + Name (_ADR, 0x00020000) +} diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl index b52de65e36..8dbd850df6 100644 --- a/src/soc/intel/cannonlake/acpi/southbridge.asl +++ b/src/soc/intel/cannonlake/acpi/southbridge.asl @@ -31,6 +31,9 @@ #include "gpio.asl" #endif +/* GFX 00:02.0 */ +#include "gfx.asl" + /* LPC 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl> |