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authorDaniel Kulesz <daniel.ina1@googlemail.com>2017-02-15 14:35:43 +0100
committerTimothy Pearson <tpearson@raptorengineering.com>2017-03-02 20:40:30 +0100
commit610d1c67b2298a9840681c2b4492b6d3fdf44a46 (patch)
tree8208e2b3d0f478f25973e85bdcc5e6e4767d959b
parent59eddac6ad1f948af69ee25f3dc26adb56a376d0 (diff)
Revert "nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h"
This reverts commit fec8872c9dee4411ba1a89fc8ec833a700b476c6. The commit introduced a regression which is causing MC4 failures when 8 RDIMMs are populated in a configuration with a single CPU package. Using just 4 RDIMMs, the failure does not occur. After reverting the commit, I tested configurations with 1 CPU (8x8=64GB) and 2 CPU packages (16x8=128GB) using an Opteron 6276. The MC4 failures did not occur anymore. Change-Id: Ic6c9de84c38f772919597950ba540a3b5de68a65 Signed-off-by: Daniel Kulesz <daniel.ina1@googlemail.com> Reviewed-on: https://review.coreboot.org/18369 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctproc.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
index 48658f58e5..ecdd4a25be 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
@@ -72,9 +72,6 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
misc2 |= ((cs_mux_67 & 0x1) << 27);
misc2 &= ~(0x1 << 26); /* CsMux45 = cs_mux_45 */
misc2 |= ((cs_mux_45 & 0x1) << 26);
-
- if (pDCTstat->Status & (1 << SB_Registered))
- misc2 |= 1 << SubMemclkRegDly;
} else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
if (pDCTstat->Status & (1 << SB_Registered)) {
misc2 |= 1 << SubMemclkRegDly;