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authorZheng Bao <zheng.bao@amd.com>2010-06-03 07:51:09 +0000
committerZheng Bao <Zheng.Bao@amd.com>2010-06-03 07:51:09 +0000
commit5d6aede981a02bdef353bea09bd16f3cea4a4be9 (patch)
tree2b2b617521930d15814a705b47fe3fb9033d71d7
parent5f067015ea97f56012cf0c1e386bc98de5f72d2c (diff)
The code was ported. Now it is what it should be.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/southbridge/amd/rs780/rs780_gfx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/rs780/rs780_gfx.c b/src/southbridge/amd/rs780/rs780_gfx.c
index b1dd762ec5..753af0079f 100644
--- a/src/southbridge/amd/rs780/rs780_gfx.c
+++ b/src/southbridge/amd/rs780/rs780_gfx.c
@@ -337,7 +337,7 @@ static void internal_gfx_pci_dev_init(struct device *dev)
value = nbmc_read_index(nb_dev, 0x10);
*(GpuF0MMReg + 0x2000/4) = 0x11;
*(GpuF0MMReg + 0x2180/4) = ((value&0xff00)>>8)|((value&0xff000000)>>8);
- *(GpuF0MMReg + 0x2c04/4) = ((value&0xff0)<<8);
+ *(GpuF0MMReg + 0x2c04/4) = ((value&0xff00)<<8);
*(GpuF0MMReg + 0x5428/4) = ((value&0xffff0000)+0x10000)-((value&0xffff)<<16);
*(GpuF0MMReg + 0x2000/4) = 0x00000011;
*(GpuF0MMReg + 0x200c/4) = 0x00000020;