diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-07-12 11:56:31 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2018-07-16 14:41:10 +0000 |
| commit | 517c4c15630e07db6991d5944dd4e5182c7e43ef (patch) | |
| tree | 7fd7e45a8bd21ce2295c8b52125885bc8d801574 | |
| parent | cff16b6f9df38135ab7619b61332318dded45edc (diff) | |
soc/cavium: Fix overflow before widen
Fix Coverity CID1393974
Change-Id: I39caea8a248d2f1debfca307f6fb7a2fe3e431b1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/soc/cavium/cn81xx/gpio.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/soc/cavium/cn81xx/gpio.c b/src/soc/cavium/cn81xx/gpio.c index 340ac1bc73..84e36d19fd 100644 --- a/src/soc/cavium/cn81xx/gpio.c +++ b/src/soc/cavium/cn81xx/gpio.c @@ -103,9 +103,9 @@ void gpio_set(gpio_t gpio, int value) printk(BIOS_SPEW, "GPIO(%u): level: %u\n", gpio, !!value); if (value) - write64(®s->tx_set, 1 << gpio); + write64(®s->tx_set, 1ULL << gpio); else - write64(®s->tx_clr, 1 << gpio); + write64(®s->tx_clr, 1ULL << gpio); } /* Set GPIO direction to OUTPUT with level */ @@ -153,9 +153,10 @@ int gpio_get(gpio_t gpio) return 0; const u64 reg = read64(®s->rx_dat); - printk(BIOS_SPEW, "GPIO(%u): input: %u\n", gpio, !!(reg & (1 << gpio))); + printk(BIOS_SPEW, "GPIO(%u): input: %u\n", gpio, + !!(reg & (1ULL << gpio))); - return !!(reg & (1 << gpio)); + return !!(reg & (1ULL << gpio)); } /* Read GPIO STRAP level sampled at cold boot */ @@ -167,9 +168,10 @@ int gpio_strap_value(gpio_t gpio) return 0; const u64 reg = read64(®s->strap); - printk(BIOS_SPEW, "GPIO(%u): strap: %u\n", gpio, !!(reg & (1 << gpio))); + printk(BIOS_SPEW, "GPIO(%u): strap: %u\n", gpio, + !!(reg & (1ULL << gpio))); - return !!(reg & (1 << gpio)); + return !!(reg & (1ULL << gpio)); } /* FIXME: Parse devicetree ? */ |