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authorFelix Held <felix.held@amd.corp-partner.google.com>2020-06-19 20:18:12 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-06-20 19:09:15 +0000
commit3b1f21e4f26483e3774b86d3b0e6c620a14f88cd (patch)
treee3e0643cceea6453c661cd86848ec5652ac4b6c9
parentfca4535acf9231be90afa15cf9ef3c1058a74d62 (diff)
mb/google/zork: remove redundant IRQ routing configuration
The PIC and APIC IRQ routing tables are pre-populated with PIRQ_NC in init_tables(), so the fch_pirq table entries where both IRQ numbers are set to fch_pirq are redundant and can be removed. Change-Id: I0d9b4f25e12a66cf86d1ad541955c3d2fe336c5a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42568 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
-rw-r--r--src/mainboard/google/zork/mainboard.c28
1 files changed, 0 insertions, 28 deletions
diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c
index c6b4bdd0fc..b17c7f8b9d 100644
--- a/src/mainboard/google/zork/mainboard.c
+++ b/src/mainboard/google/zork/mainboard.c
@@ -79,41 +79,13 @@ static const struct fch_apic_routing {
{ PIRQ_B, 6, 17 },
{ PIRQ_C, 14, 18 },
{ PIRQ_D, 15, 19 },
- { PIRQ_E, PIRQ_NC, PIRQ_NC },
- { PIRQ_F, PIRQ_NC, PIRQ_NC },
- { PIRQ_G, PIRQ_NC, PIRQ_NC },
- { PIRQ_H, PIRQ_NC, PIRQ_NC },
- { PIRQ_SIRQA, PIRQ_NC, PIRQ_NC },
- { PIRQ_SIRQB, PIRQ_NC, PIRQ_NC },
- { PIRQ_SIRQC, PIRQ_NC, PIRQ_NC },
- { PIRQ_SIRQD, PIRQ_NC, PIRQ_NC },
{ PIRQ_SCI, 9, 9 },
- { PIRQ_SMBUS, PIRQ_NC, PIRQ_NC },
- { PIRQ_ASF, PIRQ_NC, PIRQ_NC },
- { PIRQ_PMON, PIRQ_NC, PIRQ_NC },
- { PIRQ_SD, PIRQ_NC, PIRQ_NC },
- { PIRQ_SDIO, PIRQ_NC, PIRQ_NC },
- { PIRQ_CIR, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPIOA, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPIOB, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPIOC, PIRQ_NC, PIRQ_NC },
- { PIRQ_SATA, PIRQ_NC, PIRQ_NC },
{ PIRQ_EMMC, 5, 5 },
- { PIRQ_GPP0, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPP1, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPP2, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPP3, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPIO, 7, 7 },
- { PIRQ_I2C0, PIRQ_NC, PIRQ_NC },
- { PIRQ_I2C1, PIRQ_NC, PIRQ_NC },
{ PIRQ_I2C2, 10, 10 },
{ PIRQ_I2C3, 11, 11 },
{ PIRQ_UART0, 4, 4 },
{ PIRQ_UART1, 3, 3 },
- { PIRQ_I2C4, PIRQ_NC, PIRQ_NC },
- { PIRQ_I2C5, PIRQ_NC, PIRQ_NC },
- { PIRQ_UART2, PIRQ_NC, PIRQ_NC },
- { PIRQ_UART3, PIRQ_NC, PIRQ_NC },
/* The MISC registers are not interrupt numbers */
{ PIRQ_MISC, 0xfa, 0x00 },