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authorElyes HAOUAS <ehaouas@noos.fr>2019-01-31 20:53:10 +0100
committerFelix Held <felix-coreboot@felixheld.de>2019-02-04 11:20:28 +0000
commit2b2325ef87ce57a1e53ad4bfc757854a36cf638e (patch)
tree98aa88ff3df4ec2deb78457056c24bb3246dad40
parentcff6a1df3bacb9cd336c01c4ca5fe33ecd61dc80 (diff)
superio/winbond/w83627ehg: Correct CR 0x2a comment
Register 0x2a [Bit 1] is a PIN89, PIN90 function select for i2c Change-Id: I9231a68ec7e9a3130a6b6975544bf89ab09cb3e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/superio/winbond/w83627ehg/superio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c
index 04dda6edc7..736d660e40 100644
--- a/src/superio/winbond/w83627ehg/superio.c
+++ b/src/superio/winbond/w83627ehg/superio.c
@@ -32,7 +32,7 @@ static void enable_hwm_smbus(struct device *dev)
{
u8 reg8;
- /* Configure pins 91/92 as SDA/SCL (I2C bus). */
+ /* Configure pins 89/90 as SDA/SCL (I2C bus). */
reg8 = pnp_read_config(dev, 0x2a);
reg8 |= (1 << 1);
pnp_write_config(dev, 0x2a, reg8);