diff options
| author | Wonkyu Kim <wonkyu.kim@intel.com> | 2020-01-02 16:30:48 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-14 18:27:21 +0000 |
| commit | 23140933b7d6bbe77e60c2d6a4b52ec7c48a2474 (patch) | |
| tree | c47fee21aa1d0f91d8b9ddbf12c829a66fabf503 | |
| parent | ebb2d3c8b78b43495d4c72121ca298c172f7553d (diff) | |
mb/intel/tglrvp: Update Kconfig
Updating Kconfig to add Chrome OS support with
both internal and external EC
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ia63c06e3b4b4effcace7a8458b1066a615de2008
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38148
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/intel/tglrvp/Kconfig | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig index bee72cfdbe..5eec51ee43 100644 --- a/src/mainboard/intel/tglrvp/Kconfig +++ b/src/mainboard/intel/tglrvp/Kconfig @@ -3,19 +3,24 @@ if BOARD_INTEL_TGLRVP_UP3 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_32768 - select EC_ACPI - select GENERIC_SPD_BIN select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select MAINBOARD_HAS_CHROMEOS - select GENERIC_SPD_BIN select DRIVERS_I2C_HID select DRIVERS_I2C_GENERIC + select DRIVERS_I2C_MAX98373 select DRIVERS_USB_ACPI + select DRIVERS_SPI_ACPI + select GENERATE_SMBIOS_TABLES select SOC_INTEL_TIGERLAKE - select MAINBOARD_USES_IFD_EC_REGION select INTEL_LPSS_UART_FOR_CONSOLE +config CHROMEOS + bool + default y + select GBB_FLAG_FORCE_DEV_SWITCH_ON + select GBB_FLAG_FORCE_DEV_BOOT_USB + config MAINBOARD_DIR string default "intel/tglrvp" @@ -24,6 +29,11 @@ config VARIANT_DIR string default "tglrvp_up3" if BOARD_INTEL_TGLRVP_UP3 +config GBB_HWID + string + depends on CHROMEOS + default "TGLRVP" if BOARD_INTEL_TGLRVP_UP3 + config MAINBOARD_PART_NUMBER string default "tglrvp" @@ -44,9 +54,31 @@ config DIMM_SPD_SIZE int default 512 +choice TGL_EC + prompt "ON BOARD EC" + default TGL_CHROME_EC + help + This option allows you to select the on board EC to use. + Select whether the board has Intel EC or Chrome EC + +config TGL_CHROME_EC + bool "Chrome EC" + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_ESPI + select EC_GOOGLE_CHROMEEC_BOARDID + select EC_ACPI + +config TGL_INTEL_EC + bool "Intel EC" + select EC_ACPI + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC +endchoice + config VBOOT select VBOOT_LID_SWITCH select VBOOT_MOCK_SECDATA + select HAS_RECOVERY_MRC_CACHE + select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN config UART_FOR_CONSOLE int |