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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-02-16 15:17:48 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-02-18 23:58:22 +0000
commit2091965973f49e465b0f7f0dc3cafc676f7a1ee1 (patch)
tree5a20cd3de100ee66f9010375c26b57318f7a8b93
parent887cf3017ac3e51d38bb0f65553b5d28da9ce1f1 (diff)
mb/google/brya: Enable MLB USB Type-A Port
The USB Type-A port on the MLB was added to the schematic at the last minute and it was missed when adding brya0's overridetree. Also fix a few USB ACPI entries. BUG=b:180403898 TEST=`lsusb` shows plugged-in flash drive Change-Id: I8bf96a8b365cb4ea2fc07d7cf673b08e8872ff88 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50816 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/mainboard/google/brya/variants/brya0/overridetree.cb28
1 files changed, 22 insertions, 6 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index df670480c4..030d19e6fa 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -5,6 +5,10 @@ chip soc/intel/alderlake
register "SaGv" = "SaGv_Disabled"
+ register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
+
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+
device domain 0 on
device ref cnvi_wifi on
chip drivers/wifi/generic
@@ -204,19 +208,19 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "group" = "ACPI_PLD_GROUP(1, 1)"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 2)"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(4, 2)"
+ register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref tcss_usb3_port3 on end
end
end
@@ -254,7 +258,13 @@ chip soc/intel/alderlake
device ref usb2_port6 on end
end
chip drivers/usb/acpi
- register "desc" = ""USB2 Type-A Port A0 (MLB)""
+ register "desc" = ""USB2 Type-A Port (MLB)""
+ register "type" = "UPC_TYPE_A"
+ register "group" = "ACPI_PLD_GROUP(4, 1)"
+ device ref usb2_port8 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
device ref usb2_port9 on end
@@ -267,15 +277,21 @@ chip soc/intel/alderlake
device ref usb2_port10 on end
end
chip drivers/usb/acpi
- register "desc" = ""USB3 Type-A Port A0 (MLB)""
+ register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-A Port (MLB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "group" = "ACPI_PLD_GROUP(4, 1)"
+ device ref usb3_port2 on end
+ end
+ chip drivers/usb/acpi
register "desc" = ""USB3 WWAN""
register "type" = "UPC_TYPE_INTERNAL"
- device ref usb3_port3 on end
+ device ref usb3_port4 on end
end
end
end