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author | Youness Alaoui <youness.alaoui@puri.sm> | 2018-05-04 15:33:54 -0400 |
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committer | Martin Roth <martinroth@google.com> | 2018-05-08 02:58:56 +0000 |
commit | 1f64b01bbe0007f0364d23715ff0aef0a1eec336 (patch) | |
tree | 994782b1dd1f9e57cae8a4260dea0989f9973c9d | |
parent | 55b183f1126e8f9832f83a1dabc5d0b6cb8efd5c (diff) |
intel/broadwell: If L1 Sub state is disabled, do not set capability
I finally found out why disabling the L1 sub state option did not
prevent some NVMe drives from locking up in L1 substate. I expect
that the disabled L1 substate initialization that coreboot does
is negated because Linux might itself configure it if it finds the
capability enabled on the PCIe root port.
Removing the capability from the PCIe root port when L1 sub states
are disabled in the configuration should fix the problem.
This was not tested because it's a difficult issue to reproduce and
I do not have the problematic hardware that caused it anymore.
Change-Id: I293a650db307e77cee024a43fbfc81e1d8c86265
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/25325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | src/soc/intel/broadwell/pcie.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c index 12d278fce7..db948596a5 100644 --- a/src/soc/intel/broadwell/pcie.c +++ b/src/soc/intel/broadwell/pcie.c @@ -559,7 +559,10 @@ static void pch_pcie_early(struct device *dev) (1 << 29) | 0x10001); /* Set L1 Sub-State Cap ID to 1Eh and Next Cap Pointer to None. */ - pci_update_config32(dev, 0x200, ~0xffff, 0x001e); + if (IS_ENABLED(CONFIG_PCIEXP_L1_SUB_STATE)) + pci_update_config32(dev, 0x200, ~0xfffff, 0x001e); + else + pci_update_config32(dev, 0x200, ~0xfffff, 0); pci_update_config32(dev, 0x320, ~(3 << 20) & ~(7 << 6), (1 << 20) | (3 << 6)); |