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authorFurquan Shaikh <furquan@google.com>2020-05-29 09:03:30 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:28:31 +0000
commit17dfa7e25c794c99e9cd18372103860dbd0828b8 (patch)
treef525a2608ebd79473a5e67da725799c4a1bf797b
parent5ce3bca1e7e769df7941d818dcc65484ad1b2b53 (diff)
soc/intel/jasperlake: Generate LP4x SPD files using gen_spd.go
This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to generate SPD files for currently known LP4x memory parts that can be used with JSL-based mainboards. Following files are added: 1. spd-*.hex: SPD files auto-generated by gen_spd.go 2. spd_manifest.generated.txt: Manifest file auto-generated by gen_spd.go Mainboards can use the SPD files from SoC directly when creating SPD binary to add to CBFS. Change-Id: Ic52506b809c66b9f7cf25a100a959d85c67addf2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41876 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-1.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-2.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-3.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-4.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-5.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-6.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd-7.hex32
-rw-r--r--src/soc/intel/jasperlake/spd/lp4x/spd_manifest.generated.txt9
8 files changed, 233 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex
new file mode 100644
index 0000000000..06a06e1ea3
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex
new file mode 100644
index 0000000000..ae9fe3cc58
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex
new file mode 100644
index 0000000000..7da85a55d8
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex
new file mode 100644
index 0000000000..3f3f21cdbd
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex
new file mode 100644
index 0000000000..8f5bd4e5d1
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex
new file mode 100644
index 0000000000..f025cbdf5a
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex
new file mode 100644
index 0000000000..69d75bc669
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex
@@ -0,0 +1,32 @@
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diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd_manifest.generated.txt b/src/soc/intel/jasperlake/spd/lp4x/spd_manifest.generated.txt
new file mode 100644
index 0000000000..e916733f43
--- /dev/null
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd_manifest.generated.txt
@@ -0,0 +1,9 @@
+H9HCNNNBKMMLXR-NEE,spd-1.hex
+H9HCNNNFAMMLXR-NEE,spd-2.hex
+K4U6E3S4AA-MGCL,spd-1.hex
+K4UBE3D4AA-MGCL,spd-3.hex
+MT53E1G32D2NP-046 WT:A,spd-4.hex
+H9HKNNNCRMBVAR-NEH,spd-5.hex
+MT53E1G64D4SQ-046 WT:A,spd-6.hex
+MT53E512M32D2NP-046 WT:F,spd-1.hex
+NT6AP256T32AV-J2,spd-7.hex