diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2020-04-21 11:52:58 -0500 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@gmail.com> | 2020-04-28 08:02:08 +0000 |
| commit | ec926e080303b8b018ed127a1c8af8c78f6c4da9 (patch) | |
| tree | 369ff02a2571da831b9101ec19e5a95c2f63ca05 | |
| parent | febe5b8a01c78ce8ee5ccb2bd44694666fb4cc70 (diff) | |
mb/google/octopus: add default non-ChromeOS FMAP
Add a FMAP which supports SMMSTORE and non-ChromeOS payloads,
since GeminiLake-based devices like Octopus cannot use an
automatically-generated FMAP due to strict layout requirements.
Change-Id: Iebacbea5b3a782b2abf1d6e28acd21b87dc9402b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40596
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/octopus/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/google/octopus/default.fmd | 24 |
2 files changed, 27 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 01e9f9fba5..7d9e1e8efa 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -137,4 +137,7 @@ config DRAM_PART_IN_CBI_BOARD_ID_MIN default 1 if BOARD_GOOGLE_MEEP default 255 if BOARD_GOOGLE_OCTOPUS +config FMDFILE + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/default.fmd" if !CHROMEOS + endif # BOARD_GOOGLE_OCTOPUS diff --git a/src/mainboard/google/octopus/default.fmd b/src/mainboard/google/octopus/default.fmd new file mode 100644 index 0000000000..6e6b64fd0b --- /dev/null +++ b/src/mainboard/google/octopus/default.fmd @@ -0,0 +1,24 @@ +FLASH 16M { + SI_DESC@0x0 0x1000 + SI_BIOS@0x1000 0xf6f000 { + IFWI@0x0 0x1ff000 + # SMMSTORE requires 64k alignment + SMMSTORE@0xa5e000 0x40000 + RW_MRC_CACHE 0x10000 + FMAP 0x300 + COREBOOT(CBFS) + BIOS_UNUSABLE 0x4f000 + } + DEVICE_EXTENSION@0xf7f000 0x80000 + # Currently, it is required that the BIOS region be a multiple of 8KiB. + # This is required so that the recovery mechanism can find SIGN_CSE + # region aligned to 4K at the center of BIOS region. Since the + # descriptor at the beginning uses 4K and BIOS starts at an offset of + # 4K, a hole of 4K is created towards the end of the flash to compensate + # for the size requirement of BIOS region. + # FIT tool thus creates descriptor with following regions: + # Descriptor --> 0 to 4K + # BIOS --> 4K to 0xf7f000 + # Device ext --> 0xf7f000 to 0xfff000 + UNUSED_HOLE@0xfff000 0x1000 +} |