diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-21 03:46:58 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-21 19:03:08 +0000 |
| commit | eb723f01afd6fa248560bc6749abd744f3ab3c6c (patch) | |
| tree | 4fcc6eb9ce1aa76e36c5446981dff9b09949a1a8 | |
| parent | 70992a4335560e0336605fe9fffa86c727b63b08 (diff) | |
mb/siemens/chili: do UART pad configuration at board-level
UART pad configuration should not be done in common code, because that
may cause short circuits, when the user sets a wrong UART index. Thus,
add the corresponding pads to a bootblock gpio table for the board as a
first step. Common UART pad config code then gets dropped in CB:48829.
Change-Id: Iad40b6315a29e7aea612a3e1a169372d296d1d6c
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49443
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/siemens/chili/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/mainboard/siemens/chili/bootblock.c | 11 | ||||
| -rw-r--r-- | src/mainboard/siemens/chili/include/variant/gpio.h | 1 | ||||
| -rw-r--r-- | src/mainboard/siemens/chili/variants/chili/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/mainboard/siemens/chili/variants/chili/gpio_early.c | 16 |
5 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/siemens/chili/Makefile.inc b/src/mainboard/siemens/chili/Makefile.inc index c57c0a50dc..f3461344c3 100644 --- a/src/mainboard/siemens/chili/Makefile.inc +++ b/src/mainboard/siemens/chili/Makefile.inc @@ -2,6 +2,8 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include +bootblock-y += bootblock.c + romstage-y += romstage.c ramstage-y += mainboard.c diff --git a/src/mainboard/siemens/chili/bootblock.c b/src/mainboard/siemens/chili/bootblock.c new file mode 100644 index 0000000000..7ea7eb0186 --- /dev/null +++ b/src/mainboard/siemens/chili/bootblock.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <variant/gpio.h> + +__weak void variant_configure_early_gpios(void) {} + +void bootblock_mainboard_early_init(void) +{ + variant_configure_early_gpios(); +} diff --git a/src/mainboard/siemens/chili/include/variant/gpio.h b/src/mainboard/siemens/chili/include/variant/gpio.h index 4258325cf9..95d576294f 100644 --- a/src/mainboard/siemens/chili/include/variant/gpio.h +++ b/src/mainboard/siemens/chili/include/variant/gpio.h @@ -3,6 +3,7 @@ #ifndef VARIANT_GPIO_H #define VARIANT_GPIO_H +void variant_configure_early_gpios(void); void variant_configure_gpios(void); #endif diff --git a/src/mainboard/siemens/chili/variants/chili/Makefile.inc b/src/mainboard/siemens/chili/variants/chili/Makefile.inc index 251a2916a2..4f1d0655fa 100644 --- a/src/mainboard/siemens/chili/variants/chili/Makefile.inc +++ b/src/mainboard/siemens/chili/variants/chili/Makefile.inc @@ -1,5 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-only +bootblock-y += gpio_early.c + romstage-y += romstage.c romstage-y += gpio.c diff --git a/src/mainboard/siemens/chili/variants/chili/gpio_early.c b/src/mainboard/siemens/chili/variants/chili/gpio_early.c new file mode 100644 index 0000000000..62d7783c4b --- /dev/null +++ b/src/mainboard/siemens/chili/variants/chili/gpio_early.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/gpio.h> +#include <variant/gpio.h> + +static const struct pad_config early_gpio_table[] = { +/* GPP_C8 UART0A_RXD 0x0000005044000702 */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), +/* GPP_C9 UART0A_TXD 0x0000005144000700 */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), +/* GPP_C20 UART2_RXD 0x0000005c44000500 */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), +/* GPP_C21 UART2_TXD 0x0000005d44000600 */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), +}; + +void variant_configure_early_gpios(void) +{ + gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); +} |