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authorAngel Pons <th3fanbus@gmail.com>2020-10-29 11:06:11 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:02:34 +0000
commitb7fe4485751dc283babd80dd58cf0d23341fe9af (patch)
tree5591312f7d321d5f45158c11e58a56f53ac6ed68
parentba78fce8680573b83ba1b5f9e322d1f7cf169dd3 (diff)
mb/intel/wtm2: Use Haswell CPU code
Change-Id: I478576afa3b390cf5480298aafe6e049b5e90bff Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46947 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/intel/wtm2/Kconfig1
-rw-r--r--src/mainboard/intel/wtm2/devicetree.cb5
2 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig
index 7ac5f1c9aa..7cb9e1c2e2 100644
--- a/src/mainboard/intel/wtm2/Kconfig
+++ b/src/mainboard/intel/wtm2/Kconfig
@@ -2,6 +2,7 @@ if BOARD_INTEL_WTM2
config BOARD_SPECIFIC_OPTIONS
def_bool y
+ select CPU_INTEL_HASWELL
select SOC_INTEL_BROADWELL
select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
diff --git a/src/mainboard/intel/wtm2/devicetree.cb b/src/mainboard/intel/wtm2/devicetree.cb
index 29041aaeca..9090999153 100644
--- a/src/mainboard/intel/wtm2/devicetree.cb
+++ b/src/mainboard/intel/wtm2/devicetree.cb
@@ -10,7 +10,10 @@ chip soc/intel/broadwell
register "gpu_dp_b_hotplug" = "0x06"
device cpu_cluster 0 on
- device lapic 0 on end
+ chip cpu/intel/haswell
+ device lapic 0 on end
+ device lapic 0xacac off end
+ end
end
device domain 0 on
device pci 00.0 on end # host bridge