diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-13 23:29:41 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-27 13:47:38 +0000 |
commit | 7d802a48f3a0a72e99feb6e3fc90adab7d706511 (patch) | |
tree | 8643941ac4b3024aad93521a2096f0b74667d750 | |
parent | b48d63359bb4beb63cf2e14edb7b1d833e602ce1 (diff) |
soc/intel/baytrail: Don't reinitialize SPI after lockdown
With the common southbridge SPI code reinitialization after lockdown
is not necessary, hence the SMM finalize call becomes a no-op.
Change-Id: Ie73a0adc120731d541a772e09f3482902771b9eb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36008
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/soc/intel/baytrail/smihandler.c | 20 | ||||
-rw-r--r-- | src/soc/intel/baytrail/southcluster.c | 3 |
2 files changed, 0 insertions, 23 deletions
diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 16e2d950b5..2a92cb954c 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -229,22 +229,6 @@ static void southbridge_smi_gsmi(void) *ret = gsmi_exec(sub_command, param); } -static void finalize(void) -{ - static int finalize_done; - - if (finalize_done) { - printk(BIOS_DEBUG, "SMM already finalized.\n"); - return; - } - finalize_done = 1; - -#if CONFIG(SPI_FLASH_SMM) - /* Re-init SPI driver to handle locked BAR */ - spi_init(); -#endif -} - /* * soc_legacy: A payload (Depthcharge) has indicated that the * legacy payload (SeaBIOS) is being loaded. Switch devices that are @@ -348,10 +332,6 @@ static void southbridge_smi_apmc(void) if (CONFIG(ELOG_GSMI)) southbridge_smi_gsmi(); break; - case APM_CNT_FINALIZE: - finalize(); - break; - case APM_CNT_LEGACY: soc_legacy(); break; diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index fb6143efb0..55bef11909 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -577,9 +577,6 @@ static void finalize_chipset(void *unused) write32(spi + UVSCC, cfg.uvscc); write32(spi + LVSCC, cfg.lvscc | VCL); } - - printk(BIOS_DEBUG, "Finalizing SMM.\n"); - outb(APM_CNT_FINALIZE, APM_CNT); } BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL); |