summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2019-10-18 20:20:03 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-11-04 11:57:06 +0000
commit6f7c955464783ba21cda1bcf4b5582b2af0be31e (patch)
tree3af54e74f3852d03d217c08a730aab36b076d2ec
parent20994a763bc02d099a282c7dc3098222c7f5fc4f (diff)
nb/intel/nehalem: Fix 'dead assignment'
Dead increment spotted out using clang-tools. Value stored to 'some_delay_3_halfcycles' is never read. Change-Id: I8133f9e8786006bd278d281a132b6a2bd863a967 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36135 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/northbridge/intel/nehalem/raminit.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 21c13d9035..a393cb7a51 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -820,12 +820,10 @@ static void compute_derived_timings(struct raminfo *info)
int some_delay_2_halfcycles_ceil;
int some_delay_2_halfcycles_floor;
int some_delay_3_ps;
- int some_delay_3_halfcycles;
int some_delay_3_ps_rounded;
int some_delay_1_cycle_ceil;
int some_delay_1_cycle_floor;
- some_delay_3_halfcycles = 0;
some_delay_3_ps_rounded = 0;
extended_silicon_revision = info->silicon_revision;
if (!info->silicon_revision)
@@ -873,13 +871,12 @@ static void compute_derived_timings(struct raminfo *info)
some_delay_3_ps =
halfcycle_ps(info) - some_delay_2_ps % halfcycle_ps(info);
if (info->revision_flag_1) {
- if (some_delay_3_ps < 150)
- some_delay_3_halfcycles = 0;
- else
- some_delay_3_halfcycles =
+ if (some_delay_3_ps >= 150) {
+ const int some_delay_3_halfcycles =
(some_delay_3_ps << 6) / halfcycle_ps(info);
- some_delay_3_ps_rounded =
- halfcycle_ps(info) * some_delay_3_halfcycles >> 6;
+ some_delay_3_ps_rounded =
+ halfcycle_ps(info) * some_delay_3_halfcycles >> 6;
+ }
}
some_delay_2_halfcycles_ceil =
(some_delay_2_ps + halfcycle_ps(info) - 1) / halfcycle_ps(info) -