diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-17 20:32:07 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-09-20 17:38:27 +0200 |
| commit | 69d658f59df4a72a647663115c506849e6012ee1 (patch) | |
| tree | 5e365ad2213d34b181109980b08db4072c8b9d2b | |
| parent | f352e2fab82262c8b55ab95f4d591755a92f6d1b (diff) | |
northbridge/intel/haswell: Add space around operators
Change-Id: I8fa1e39bfd950475e3b55d6debcbfd92615aa379
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16628
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
| -rw-r--r-- | src/northbridge/intel/haswell/acpi.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/acpi/hostbridge.asl | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index f16be2c7a7..37101049e3 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -39,7 +39,7 @@ unsigned long acpi_fill_mcfg(unsigned long current) if (!dev) return current; - pciexbar_reg=pci_read_config32(dev, PCIEXBAR); + pciexbar_reg = pci_read_config32(dev, PCIEXBAR); // MMCFG not supported or not enabled. if (!(pciexbar_reg & (1 << 0))) diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl index e3c7d1179c..2565851beb 100644 --- a/src/northbridge/intel/haswell/acpi/hostbridge.asl +++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl @@ -144,7 +144,7 @@ Device (MCHC) } /* - * Search CPU0 _PSS looking for control=arg0 and then + * Search CPU0 _PSS looking for control = arg0 and then * return previous P-state entry number for new _PPC * * Format of _PSS: diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index ea0bc54ab4..1c7aff9ea5 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -98,7 +98,7 @@ static const struct gt_reg haswell_gt_lock[] = { u32 map_oprom_vendev(u32 vendev) { - u32 new_vendev=vendev; + u32 new_vendev = vendev; switch (vendev) { case 0x80860402: /* GT1 Desktop */ @@ -116,7 +116,7 @@ u32 map_oprom_vendev(u32 vendev) case 0x8086042a: /* GT3 Server */ case 0x80860a26: /* GT3 ULT */ - new_vendev=0x80860406; /* GT1 Mobile */ + new_vendev = 0x80860406; /* GT1 Mobile */ break; } |