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authorTobias Diedrich <ranma+coreboot@tdiedrich.de>2010-11-14 14:17:29 +0000
committerRudolf Marek <r.marek@assembler.cz>2010-11-14 14:17:29 +0000
commit5d72eb5e8eda5e7b8a653a4e9b3bba2d4adbba9e (patch)
treef79490daa41273ae5023da4062d6160262b31d34
parentd441afda9106d000ff1d518bad01e98cfb26630e (diff)
Move cable detect logic to a weak function in vt8237r_ide.c and add
an override function in m2v/mainboard.c Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/asus/m2v/mainboard.c36
-rw-r--r--src/southbridge/via/vt8237r/vt8237r.h5
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_ide.c20
3 files changed, 56 insertions, 5 deletions
diff --git a/src/mainboard/asus/m2v/mainboard.c b/src/mainboard/asus/m2v/mainboard.c
index b1ac998ccb..3d2c3cb8e4 100644
--- a/src/mainboard/asus/m2v/mainboard.c
+++ b/src/mainboard/asus/m2v/mainboard.c
@@ -17,9 +17,45 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <arch/io.h>
#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <console/console.h>
+#include "southbridge/via/vt8237r/vt8237r.h"
#include "chip.h"
+u32 vt8237_ide_80pin_detect(struct device *dev)
+{
+ device_t lpc_dev;
+ u16 acpi_io_base;
+ u32 gpio_in;
+ u32 res;
+
+ lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
+ PCI_DEVICE_ID_VIA_VT8237A_LPC, 0);
+ if (!lpc_dev)
+ return;
+
+ acpi_io_base = pci_read_config16(lpc_dev, 0x88);
+ if (!acpi_io_base || (acpi_io_base & ~1) == 0)
+ return;
+ acpi_io_base &= ~1;
+
+ gpio_in = inl(acpi_io_base + 0x48);
+ /* bit 9 for primary port, clear if unconnected or 80-pin cable */
+ res = gpio_in & (1<<9) ? 0 : VT8237R_IDE0_80PIN_CABLE;
+ /* bit 4 for secondary port, clear if unconnected or 80-pin cable */
+ res |= gpio_in & (1<<4) ? 0 : VT8237R_IDE1_80PIN_CABLE;
+
+ printk(BIOS_INFO, "Cable on %s PATA port: %d pin\n", "primary",
+ gpio_in & (1<<9) ? 40 : 80);
+ printk(BIOS_INFO, "Cable on %s PATA port: %d pin\n", "secondary",
+ gpio_in & (1<<4) ? 40 : 80);
+
+ return res;
+}
+
struct chip_operations mainboard_ops = {
CHIP_NAME("ASUS M2V")
};
diff --git a/src/southbridge/via/vt8237r/vt8237r.h b/src/southbridge/via/vt8237r/vt8237r.h
index ba7089b414..d187ce6dcf 100644
--- a/src/southbridge/via/vt8237r/vt8237r.h
+++ b/src/southbridge/via/vt8237r/vt8237r.h
@@ -45,6 +45,10 @@
#define IDE_MISC_II 0x45
#define IDE_UDMA 0x50
+#define VT8237R_IDE0_80PIN_CABLE ((1UL<<28)|(1UL<<20))
+#define VT8237R_IDE1_80PIN_CABLE ((1UL<<12)|(1UL<< 4))
+#define VT8237R_IDE_CABLESEL_MASK (VT8237R_IDE0_80PIN_CABLE|VT8237R_IDE1_80PIN_CABLE)
+
/* SMBus */
#define VT8237R_PSON 0x82
#define VT8237R_POWER_WELL 0x94
@@ -118,6 +122,7 @@ int vt8237_early_network_init(struct vt8237_network_rom *rom);
#include <device/device.h>
void writeback(struct device *dev, u16 where, u8 what);
void dump_south(device_t dev);
+u32 vt8237_ide_80pin_detect(struct device *dev);
#endif
#endif
diff --git a/src/southbridge/via/vt8237r/vt8237r_ide.c b/src/southbridge/via/vt8237r/vt8237r_ide.c
index ecbcfffc8c..209437b729 100644
--- a/src/southbridge/via/vt8237r/vt8237r_ide.c
+++ b/src/southbridge/via/vt8237r/vt8237r_ide.c
@@ -27,6 +27,19 @@
#include "chip.h"
/**
+ * Cable type detect function, weak so it can be overloaded in mainboard.c
+ */
+u32 __attribute__((weak)) vt8237_ide_80pin_detect(struct device *dev)
+{
+ struct southbridge_via_vt8237r_config *sb =
+ (struct southbridge_via_vt8237r_config *)dev->chip_info;
+ u32 res;
+ res = sb->ide0_80pin_cable ? VT8237R_IDE0_80PIN_CABLE : 0;
+ res |= sb->ide1_80pin_cable ? VT8237R_IDE1_80PIN_CABLE : 0;
+ return res;
+}
+
+/**
* No native mode. Interrupts from unconnected HDDs might occur if
* IRQ14/15 is used for PCI. Therefore no native mode support.
*/
@@ -88,11 +101,8 @@ static void ide_init(struct device *dev)
/* Cable guy... */
cablesel = pci_read_config32(dev, IDE_UDMA);
- cablesel &= ~((1 << 28) | (1 << 20) | (1 << 12) | (1 << 4));
- cablesel |= (sb->ide0_80pin_cable << 28) |
- (sb->ide0_80pin_cable << 20) |
- (sb->ide1_80pin_cable << 12) |
- (sb->ide1_80pin_cable << 4);
+ cablesel &= ~VT8237R_IDE_CABLESEL_MASK;
+ cablesel |= vt8237_ide_80pin_detect(dev);
pci_write_config32(dev, IDE_UDMA, cablesel);
#if CONFIG_EPIA_VT8237R_INIT