diff options
| author | Stefan Reinauer <stepan@openbios.org> | 2003-07-17 22:51:30 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2003-07-17 22:51:30 +0000 |
| commit | 438a3e423e66e563474828901c2aa93f5131c9ff (patch) | |
| tree | 2852372be32070b55d94772387f85538023c8568 | |
| parent | 07d72dcfa2d92ad0cc6db19a683ac800ba843fff (diff) | |
moved generate_row from coherent_ht.c to board specific auto.c files
due to different routing defaults of different boards.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/mainboard/amd/solo/auto.c | 8 | ||||
| -rw-r--r-- | src/mainboard/arima/hdama/auto.c | 43 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 3 |
3 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c index befce49a8c..848cddfc5b 100644 --- a/src/mainboard/amd/solo/auto.c +++ b/src/mainboard/amd/solo/auto.c @@ -17,6 +17,14 @@ static void memreset(const struct mem_controller *ctrl) { } +static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes) +{ + /* since the AMD Solo is a UP only machine, we can + * always return the default row entry value + */ + return 0x00010101; /* default row entry */ +} + #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" diff --git a/src/mainboard/arima/hdama/auto.c b/src/mainboard/arima/hdama/auto.c index 640bc495c1..3a361c4810 100644 --- a/src/mainboard/arima/hdama/auto.c +++ b/src/mainboard/arima/hdama/auto.c @@ -237,6 +237,49 @@ static void memreset(const struct mem_controller *ctrl) udelay(50); } +static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes) +{ + /* Routing Table Node i + * + * F0: 0x40, 0x44, 0x48, 0x4c, 0x50, 0x54, 0x58, 0x5c + * i: 0, 1, 2, 3, 4, 5, 6, 7 + * + * [ 0: 3] Request Route + * [0] Route to this node + * [1] Route to Link 0 + * [2] Route to Link 1 + * [3] Route to Link 2 + * [11: 8] Response Route + * [0] Route to this node + * [1] Route to Link 0 + * [2] Route to Link 1 + * [3] Route to Link 2 + * [19:16] Broadcast route + * [0] Route to this node + * [1] Route to Link 0 + * [2] Route to Link 1 + * [3] Route to Link 2 + */ + + uint32_t ret=0x00010101; /* default row entry */ + + static const unsigned int rows_2p[2][2] = { + { 0x00050101, 0x00010404 }, + { 0x00010404, 0x00050101 } + }; + + if(maxnodes>2) { + print_debug("this mainboard is only designed for 2 cpus\r\n"); + maxnodes=2; + } + + + if (!(node>=maxnodes || row>=maxnodes)) { + ret=rows_2p[node][row]; + } + + return ret; +} #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 5c11991646..460284bc82 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -499,6 +499,7 @@ static bool check_connection(u8 src, u8 dest, u8 link) return 1; } +#if 0 static unsigned int generate_row(u8 node, u8 row, u8 maxnodes) { /* Routing Table Node i @@ -551,6 +552,8 @@ static unsigned int generate_row(u8 node, u8 row, u8 maxnodes) return ret; } +#endif + static void fill_row(u8 node, u8 row, u32 value) { |