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authorRonald G. Minnich <rminnich@gmail.com>2004-08-24 22:27:55 +0000
committerRonald G. Minnich <rminnich@gmail.com>2004-08-24 22:27:55 +0000
commit3b0096313a3176370aaac91714d7b81dd0163b9a (patch)
tree850b4433d25f0ccb5a20effa3d5812ca866912ad
parent74bfa2c8b2a72ed88af4a84ebe6e172cd3af566b (diff)
compiles.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/digitallogic/adl855pc/Config.lb5
-rw-r--r--src/mainboard/digitallogic/adl855pc/auto.c2
-rw-r--r--src/southbridge/intel/i82801dbm/i82801dbm.h10
-rw-r--r--src/southbridge/intel/i82801dbm/i82801dbm_sata.c2
-rw-r--r--src/southbridge/intel/i82801dbm/i82801dbm_usb.c3
-rw-r--r--src/southbridge/intel/i82801dbm/i82801dbm_usb2.c2
6 files changed, 13 insertions, 11 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/Config.lb b/src/mainboard/digitallogic/adl855pc/Config.lb
index 1de157c1e5..96a9928c2a 100644
--- a/src/mainboard/digitallogic/adl855pc/Config.lb
+++ b/src/mainboard/digitallogic/adl855pc/Config.lb
@@ -210,7 +210,7 @@ mainboardinit ./auto.inc
dir /pc80
config chip.h
-northbridge intel/855pm "855pm"
+northbridge intel/i855pm "i855pm"
# pci 0:0.0
# pci 0:1.0
southbridge intel/i82801dbm "i82801dbm"
@@ -224,9 +224,6 @@ northbridge intel/855pm "855pm"
# pci 0:12.0
register "enable_usb" = "0"
register "enable_native_ide" = "0"
- register "enable_com_ports" = "1"
- register "enable_keyboard" = "0"
- register "enable_nvram" = "1"
end
end
diff --git a/src/mainboard/digitallogic/adl855pc/auto.c b/src/mainboard/digitallogic/adl855pc/auto.c
index 7b1c637cd0..26721b519d 100644
--- a/src/mainboard/digitallogic/adl855pc/auto.c
+++ b/src/mainboard/digitallogic/adl855pc/auto.c
@@ -13,6 +13,8 @@
#include "northbridge/via/vt8601/raminit.h"
#include "cpu/p6/earlymtrr.c"
+#include "southbridge/intel/i82801dbm/i82801dbm_early_smbus.c"
+
/*
*/
void udelay(int usecs)
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm.h b/src/southbridge/intel/i82801dbm/i82801dbm.h
index 85dce4ecb7..f3b06e28ce 100644
--- a/src/southbridge/intel/i82801dbm/i82801dbm.h
+++ b/src/southbridge/intel/i82801dbm/i82801dbm.h
@@ -1,13 +1,15 @@
#ifndef I82801ER_H
#define I82801ER_H
-struct southbridge_intel_i82801er_config
+struct southbridge_intel_i82801dbm_config
{
+ int enable_usb;
+ int enable_native_ide;
};
struct chip_control;
-extern struct chip_control southbridge_intel_i82801er_control;
+extern struct chip_control southbridge_intel_i82801dbm_control;
-extern void i82801er_enable(device_t dev);
+extern void i82801dbm_enable(device_t dev);
/*
000 = Non-combined. P0 is primary master. P1 is secondary master.
@@ -78,4 +80,4 @@ channel disabled.
*/
#define SMBUS_TIMEOUT (100*1000)
-#endif /* I82801ER_H */
+#endif /* I82801DBM_H */
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm_sata.c b/src/southbridge/intel/i82801dbm/i82801dbm_sata.c
index 2bc287fa36..4421859946 100644
--- a/src/southbridge/intel/i82801dbm/i82801dbm_sata.c
+++ b/src/southbridge/intel/i82801dbm/i82801dbm_sata.c
@@ -11,7 +11,7 @@ static void sata_init(struct device *dev)
uint16_t word;
uint8_t byte;
int enable_c=1, enable_d=1;
- int i;
+ // int i;
//Enable Serial ATA port
byte = pci_read_config8(dev,0x90);
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm_usb.c b/src/southbridge/intel/i82801dbm/i82801dbm_usb.c
index b810f59289..0c20e532d0 100644
--- a/src/southbridge/intel/i82801dbm/i82801dbm_usb.c
+++ b/src/southbridge/intel/i82801dbm/i82801dbm_usb.c
@@ -7,9 +7,10 @@
static void usb_init(struct device *dev)
{
- uint32_t cmd;
+
#if 0
+ uint32_t cmd;
printk_debug("USB: Setting up controller.. ");
cmd = pci_read_config32(dev, PCI_COMMAND);
pci_write_config32(dev, PCI_COMMAND,
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm_usb2.c b/src/southbridge/intel/i82801dbm/i82801dbm_usb2.c
index 5b7465da05..95dedc7e77 100644
--- a/src/southbridge/intel/i82801dbm/i82801dbm_usb2.c
+++ b/src/southbridge/intel/i82801dbm/i82801dbm_usb2.c
@@ -9,7 +9,7 @@
static void usb2_init(struct device *dev)
{
- uint32_t cmd;
+ uint32_t cmd;
#if 0
printk_debug("USB: Setting up controller.. ");