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authorIvan Labáth <iger@labo.rs>2020-02-22 17:38:32 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-02-24 12:59:53 +0000
commit3ae1765df67ff39cfe50222a1c6d05092d538057 (patch)
tree7e05b1d928ac713d379d1183a927aef8e05247a3
parentef90609cbb4229ccc242f67c48a8e14273bf0aac (diff)
Documentation: getting_started/gpio.md: fix markup
Change-Id: I2c61770d60a4f290fd8d516850f16bc3808ad48d Signed-off-by: Ivan Labáth <iger@labo.rs> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39082 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--Documentation/getting_started/gpio.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/getting_started/gpio.md b/Documentation/getting_started/gpio.md
index 26939ce7cf..81a06eb410 100644
--- a/Documentation/getting_started/gpio.md
+++ b/Documentation/getting_started/gpio.md
@@ -25,7 +25,7 @@ how to appropriately set these registers. In addition, some mainboards are
based on a baseboard/variant model, where several variant mainboards may share a
lot of their circuitry and ICs and the commonality between the boards is
collected into a virtual ``baseboard.`` In that case, the GPIOs which are shared
-between multiple boards are placed in the baseboard's ``gpio.c` file, while the
+between multiple boards are placed in the baseboard's ``gpio.c`` file, while the
ones that are board-specific go into each variant's ``gpio.c`` file.
## Intel SoCs