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authorVadim Bendebury <vbendeb@chromium.org>2012-06-19 08:34:51 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-07-24 22:18:04 +0200
commit39fea6e2a87aa79e6b156c96f0b2ba3ae9a35ba2 (patch)
tree15597b36c92ba8d75709bc68038185aeea9fe6a1
parent537b4e09e644107ed644cd88f8a7fd488406b9a2 (diff)
Add microcode blob processing
When microcode storage in CBFS is enabled, the make system is supposed to generate the microcode blob and place it into the generated ROM image as a CBFS component. The microcode source representation does not change: it is still an array of 32 bit constants. This new addition compiles the array into a separate object file and then strips all sections but data. The raw data section is then included into CBFS as a file named 'microcode_blob.bin' of type 0x53, which is assigned to microcode storage. Change-Id: I84ae040be52f520b106e3471c7e391e64d7847d9 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1295 Tested-by: build bot (Jenkins)
-rw-r--r--src/arch/x86/Makefile.inc6
-rw-r--r--src/cpu/intel/microcode/Makefile.inc14
-rw-r--r--src/cpu/intel/microcode/microcode_blob.c22
3 files changed, 42 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index f49883182e..306f239a9b 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -34,6 +34,12 @@ cmos_layout.bin-type = 0x01aa
OPTION_TABLE_H:=$(obj)/option_table.h
endif
+ifeq ($(CONFIG_MICROCODE_IN_CBFS),y)
+cbfs-files-y += microcode_blob.bin
+microcode_blob.bin-file = $(obj)/microcode_blob.bin
+microcode_blob.bin-type = 0x53
+endif
+
#######################################################################
# Build the final rom image
COREBOOT_ROM_DEPENDENCIES:=
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc
index 6631019f38..f4d01020d1 100644
--- a/src/cpu/intel/microcode/Makefile.inc
+++ b/src/cpu/intel/microcode/Makefile.inc
@@ -1 +1,15 @@
ramstage-y += microcode.c
+
+
+ifeq ($(CONFIG_MICROCODE_IN_CBFS),y)
+
+SRC_PATH = src/cpu/intel/microcode
+FLAGS = -I $(CONFIG_MICROCODE_INCLUDE_PATH) -include $(obj)/config.h
+$(obj)/microcode_blob.o: $(SRC_PATH)/microcode_blob.c
+ $(CC) $(FLAGS) -MMD -c -o $@ $<
+
+$(obj)/microcode_blob.bin: $(obj)/microcode_blob.o
+ objcopy -j .data -O binary $< $@
+
+-include $(obj)/microcode_blob.d
+endif
diff --git a/src/cpu/intel/microcode/microcode_blob.c b/src/cpu/intel/microcode/microcode_blob.c
new file mode 100644
index 0000000000..69238a9f77
--- /dev/null
+++ b/src/cpu/intel/microcode/microcode_blob.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+unsigned microcode[] = {
+#include <microcode_blob.h>
+};