diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-09-15 12:23:45 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-09-25 19:43:07 +0000 |
commit | 2a8ceefb277f3b395121bfdd9667cb1bf84bf222 (patch) | |
tree | d20974217aa27d3323a8a0f4939fcbb129bf1920 | |
parent | 8f0b3e546a6ee8501ac5c34b6522ae52b8104e2d (diff) |
nb/intel/x4x/iomap.h: Rename to memmap.h
It primarily contains definitions for MMIO windows. Also, remove
includes from files not directly using the definitions it contains.
Tested with BUILD_TIMELESS=1, Asus P5QL PRO remains identical.
Change-Id: Id28080d9b2924463dd3720492d5e717d65fa0071
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45419
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/northbridge/intel/x4x/acpi/x4x.asl | 2 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/bootblock.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/dq_dqs.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/early_init.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/memmap.h (renamed from src/northbridge/intel/x4x/iomap.h) | 6 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/raminit.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/raminit_ddr23.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/rcven.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/x4x.h | 2 |
10 files changed, 6 insertions, 12 deletions
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl index 51deea8f67..5a3c0b6132 100644 --- a/src/northbridge/intel/x4x/acpi/x4x.asl +++ b/src/northbridge/intel/x4x/acpi/x4x.asl @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include "hostbridge.asl" -#include "../iomap.h" +#include "../memmap.h" #include <southbridge/intel/common/rcba.h> /* PCI Device Resource Consumption */ diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index baa4ae336c..1192fdb1cb 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -5,7 +5,6 @@ #include <device/pci_ops.h> #include "x4x.h" -#include "iomap.h" void bootblock_early_northbridge_init(void) { diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 7378391507..1535452c1f 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -6,7 +6,6 @@ #include <string.h> #include <types.h> #include "x4x.h" -#include "iomap.h" static void print_dll_setting(const struct dll_setting *dll_setting, u8 default_verbose) diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index d3c3308831..81752cdd9f 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -2,7 +2,6 @@ #include <stdint.h> #include <device/pci_ops.h> -#include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */ #else diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/memmap.h index 22a675fc42..e4aafffbf6 100644 --- a/src/northbridge/intel/x4x/iomap.h +++ b/src/northbridge/intel/x4x/memmap.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef X4X_IOMAP_H -#define X4X_IOMAP_H +#ifndef X4X_MEMMAP_H +#define X4X_MEMMAP_H #define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ #define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ @@ -10,4 +10,4 @@ #define TPM_BASE_ADDRESS 0xfed40000 -#endif /* X4X_IOMAP_H */ +#endif /* X4X_MEMMAP_H */ diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 99b1f21843..5e46270dc1 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -8,7 +8,7 @@ #include <device/device.h> #include <boot/tables.h> #include <acpi/acpi.h> -#include <northbridge/intel/x4x/iomap.h> +#include <northbridge/intel/x4x/memmap.h> #include <northbridge/intel/x4x/chip.h> #include <northbridge/intel/x4x/x4x.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index c68c70bd31..a1be5aa449 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -14,7 +14,6 @@ #include <timestamp.h> #include <types.h> -#include "iomap.h" #include "x4x.h" #define MRC_CACHE_VERSION 0 diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 2c250683a1..617ce11581 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -13,7 +13,6 @@ #include <southbridge/intel/i82801jx/i82801jx.h> #endif #include <string.h> -#include "iomap.h" #include "x4x.h" #define ME_UMA_SIZEMB 0 diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c index 506282bc38..82481abe30 100644 --- a/src/northbridge/intel/x4x/rcven.c +++ b/src/northbridge/intel/x4x/rcven.c @@ -3,7 +3,6 @@ #include <device/mmio.h> #include <console/console.h> #include <delay.h> -#include "iomap.h" #include "x4x.h" #define MAX_COARSE 15 diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 45785a02a1..98b6038f5b 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -4,7 +4,7 @@ #define __NORTHBRIDGE_INTEL_X4X_H__ #include <stdint.h> -#include "iomap.h" +#include "memmap.h" /* * D0:F0 |