diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-12-25 15:16:25 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-17 09:54:54 +0200 |
| commit | 16d01886799796fe8abb3c4bc49e13eb27b1cec8 (patch) | |
| tree | a53b852af43efbf587dc57c049583b5554ad01de | |
| parent | 6bfabce33b698571be73a47f62fe733f18e69f66 (diff) | |
storm: define location for storing CBFS header value
The 4 byte offset value will be stored in SRAM and shared between
different coreboot stages.
BRANCH=storm
BUG=chrome-os-partner:3416, chromium:445938
TEST=with the rest of the patches in, storm successfully boots into
Linux login prompt
Change-Id: Id8df75b0c679e274532660d55410291e59f3b520
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8f2f7cf6263f4c2db70b1c87ec67f6b0308059b3
Original-Change-Id: I1ebfada93e222992300cd695d04669988206d4b1
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/237660
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9744
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/soc/memlayout.ld | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld index 6a0d6ad815..4c06020e10 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld +++ b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld @@ -32,7 +32,9 @@ SECTIONS OVERLAP_VERSTAGE_ROMSTAGE(0x2A012000, 64K) VBOOT2_WORK(0x2A022000, 16K) PRERAM_CBMEM_CONSOLE(0x2A026000, 32K) -/* 0x2e000..0x3F000 68 KB free */ + CBFS_HEADER_OFFSET(0x2A02E400) + +/* 0x2e404..0x3F000 4 bytes shy of 67KB free */ /* Keep the below area reserved at all times, it is used by various QCA components as shared data |