diff options
| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-08-09 02:07:12 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-08-11 21:12:54 +0200 |
| commit | 1394bba6bb9e8dc48afb4fe6107d8e64ee5e6855 (patch) | |
| tree | cce5ebb12c6cc6760b90ec993f50a2be0d797d4f | |
| parent | c42b5917af50a1a0b6a64330e9cdd953c46102b7 (diff) | |
arch/riscv: Fix the page table setup code
In particular:
- Fix the condition of the loop that fills the mid-level page table
- Adhere to the format of sptbr
Change-Id: I575093445edfdf5a8f54b0f8622ff0e89f77ccec
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16120
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/arch/riscv/virtual_memory.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c index 385a5fd319..bbbba7a690 100644 --- a/src/arch/riscv/virtual_memory.c +++ b/src/arch/riscv/virtual_memory.c @@ -74,7 +74,9 @@ void init_vm(uintptr_t virtMemStart, uintptr_t physMemStart, uintptr_t pageTable root_pt[(1<<RISCV_PGLEVEL_BITS)-num_middle_pts+i] = ptd_create(((uintptr_t)middle_pt >> RISCV_PGSHIFT) + i); // fill the middle page table - for (uintptr_t vaddr = virtMemStart, paddr = physMemStart; paddr < memorySize; vaddr += SUPERPAGE_SIZE, paddr += SUPERPAGE_SIZE) { + for (uintptr_t vaddr = virtMemStart, paddr = physMemStart; + paddr < physMemStart + memorySize; + vaddr += SUPERPAGE_SIZE, paddr += SUPERPAGE_SIZE) { int l2_shift = RISCV_PGLEVEL_BITS + RISCV_PGSHIFT; size_t l2_idx = (virtMemStart >> l2_shift) & ((1 << RISCV_PGLEVEL_BITS)-1); l2_idx += ((vaddr - virtMemStart) >> l2_shift); @@ -95,7 +97,8 @@ void init_vm(uintptr_t virtMemStart, uintptr_t physMemStart, uintptr_t pageTable mb(); root_page_table = root_pt; - write_csr(sptbr, root_pt); + uintptr_t ptbr = ((uintptr_t) root_pt) >> RISCV_PGSHIFT; + write_csr(sptbr, ptbr); } void initVirtualMemory(void) { |