diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-02 00:42:46 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-02 23:45:45 +0000 |
| commit | 1254e370cc786a8a87f6f60a5cbd9381a6e196ab (patch) | |
| tree | 8fb92a5d66b9695e78718560a2a572b9880fe5d3 | |
| parent | a7f018a00d7cd156e72c40c100c1d153cdc42e87 (diff) | |
soc/amd/picasso/pcie_gpe: use PICM instead of PMOD in APCI code
commit 3f2467032e3e40cd456d2d9fe5120a60283784aa changed this in the APCI
code itself, but the change in the ACPI byte code generation in
pcie_gpp.c was missed and this patch fixes that.
TEST=Fixes the regression on Mandolin.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I60de29581296101947336f70343d6206af97e307
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
| -rw-r--r-- | src/soc/amd/picasso/pcie_gpp.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/pcie_gpp.c b/src/soc/amd/picasso/pcie_gpp.c index 3101eb4637..00b32a0914 100644 --- a/src/soc/amd/picasso/pcie_gpp.c +++ b/src/soc/amd/picasso/pcie_gpp.c @@ -127,9 +127,9 @@ static void acpigen_write_PRT(const struct device *dev) acpigen_write_method("_PRT", 0); - /* If (PMOD) */ + /* If (PICM) */ acpigen_write_if(); - acpigen_emit_namestring("PMOD"); + acpigen_emit_namestring("PICM"); /* Return (Package{...}) */ acpigen_emit_byte(RETURN_OP); @@ -192,7 +192,7 @@ static void acpigen_write_PRT(const struct device *dev) * * Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table * { - * If (PMOD) + * If (PICM) * { * Return (Package (0x04) * { |