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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2016-03-07 13:29:24 -0600
committerMartin Roth <martinroth@google.com>2016-03-11 18:53:32 +0100
commit10d6fceaa05112cd8780a46fd1b1db565c4dd21c (patch)
tree7a58c8df042a53309fcc74ded17ece5773de055a
parented85f614b06826721fdaf82df6cc049c4e35815a (diff)
nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15
Change-Id: Ia26950a8297f0a7125c21e995c89a3fc68d9d8a9 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13932 Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
index 3ab8e46098..fc081549f3 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
@@ -1342,14 +1342,11 @@ static uint8_t TrainDQSRdWrPos_D_Fam15(struct MCTStatStruc *pMCTstat,
Errors = 0;
dual_rank = 0;
- Receiver = mct_InitReceiver_D(pDCTstat, dct);
- if (receiver_start > Receiver)
- Receiver = receiver_start;
/* There are four receiver pairs, loosely associated with chipselects.
* This is essentially looping over each rank within each DIMM.
*/
- for (; Receiver < receiver_end; Receiver++) {
+ for (Receiver = receiver_start; Receiver < receiver_end; Receiver++) {
dimm = (Receiver >> 1);
if ((Receiver & 0x1) == 0) {
/* Even rank of DIMM */