diff options
author | Furquan Shaikh <furquan@google.com> | 2014-04-11 14:57:11 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-12 20:56:50 +0100 |
commit | 0a5834b8bba458fbdd5ac0226cba95bffc1a9c32 (patch) | |
tree | 5a50c466b17fa4b634b6d23654ca70edb50d65bc | |
parent | 75b4beb1518f26f26990ed8fd851376ef5299860 (diff) |
ipq806x: Typecast address to void * in read/write operations
Typecast address to void* to accomodate address being passed as integers
BUG=None
BRANCH=None
TEST=Compiled successfully
Original-Change-Id: Iceb51056c8a30a9a9dbd0594f75c23000faa6120
Original-Reviewed-on: https://chromium-review.googlesource.com/194365
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit abf9b1e77b8a078e6ed873cbf34246bd97c81e98)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I1806e96e194e936975a43e95b9fd7d7458ef1653
Reviewed-on: http://review.coreboot.org/7265
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r-- | src/soc/qualcomm/ipq806x/include/iomap.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h index 514c6a7d22..a7066af507 100644 --- a/src/soc/qualcomm/ipq806x/include/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/iomap.h @@ -37,6 +37,15 @@ #define _PLATFORM_MSM8960_IOMAP_H_ #include <configs/ipq806x_cdp.h> + +/* Typecast to allow integers being passed as address + This needs to be included because vendor code is not compliant with our + macros for read/write. Hence, special macros for readl_i and writel_i are + included to do this in one place for all occurrences in vendor code + */ +#define readl_i(a) read32((const void *)(a)) +#define writel_i(v,a) write32(v,(void *)a) + #define MSM_CLK_CTL_BASE 0x00900000 #define MSM_TMR_BASE 0x0200A000 |