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authorKane Chen <kane.chen@intel.com>2020-08-17 17:53:08 +0800
committerSubrata Banik <subrata.banik@intel.com>2020-08-24 13:40:15 +0000
commit000549266e51c6a91d6532564cd70fc63d2ae6b3 (patch)
treee2ea331b049f38893288b2731f0f9390d630952b
parent9f4835ec2b5715365891de792b311dfeae6878a9 (diff)
soc/intel/jasperlake: Run pmc_set_acpi_mode() during .init in pmc_ops
pmc_set_acpi_mode will set EC SMI mask to 1 in the end. However google_chromeec_events_init will clear EC SMI mask. If google_chromeec_events_init is ran after pmc_set_acpi_mode, the EC SMI mask will be 0 in depthcharge and causes lidclose function not working. So, pmc_set_acpi_mode() should run after google_chromeec_events_init. This code is mainly from CB:42677 BUG=b:16338215 TEST=Close lid in depthcharge and the dut can be shutdown on waddledoo. Signed-off-by: Kane Chen <kane.chen@intel.com> Change-Id: I0f06e8b5da00eb05a34a6ce1de6d713005211c08 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
-rw-r--r--src/soc/intel/jasperlake/pmc.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c
index 44430556a1..ed6a31dc58 100644
--- a/src/soc/intel/jasperlake/pmc.c
+++ b/src/soc/intel/jasperlake/pmc.c
@@ -78,8 +78,6 @@ static void pmc_init(struct device *dev)
pmc_set_power_failure_state(true);
pmc_gpe_init();
- pmc_set_acpi_mode();
-
config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc);
config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc);
config_deep_sx(config->deep_sx_config);
@@ -98,8 +96,23 @@ static void soc_pmc_read_resources(struct device *dev)
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
+static void soc_acpi_mode_init(struct device *dev)
+{
+ /*
+ * pmc_set_acpi_mode() should be delayed until BS_DEV_INIT in order
+ * to ensure the ordering does not break the assumptions that other
+ * drivers make about ACPI mode (e.g. Chrome EC). Since it disables
+ * ACPI mode, other drivers may take different actions based on this
+ * (e.g. Chrome EC will flush any pending hostevent bits). Because
+ * JSL has its PMC device available for device_operations, it can be
+ * done from the "ops->init" callback.
+ */
+ pmc_set_acpi_mode();
+}
+
struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources,
+ .init = soc_acpi_mode_init,
.enable = pmc_init,
};