diff options
author | Ryan Salsamendi <rsalsamendi@hotmail.com> | 2016-06-24 12:01:11 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-07-07 17:05:45 +0200 |
commit | e4da9aa8974578eb35eea00bff0490d9a9f1b8e2 (patch) | |
tree | 92962487b5c7ce08e0702d040f8dac8422f90db1 | |
parent | 6507e6f056a38040fe6cb9bc455cbb224f02c981 (diff) |
intel/sandybridge: read correct leaf for cpu family
Reading cpuid leaf 0 is incorrect for testing cpu family.
Use leaf 1 instead. See Intel SDM 2a Table 3-17.
Change-Id: Ib2c95cdd1fb93db06a08ecd7266f6b88700caf83
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/15346
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
-rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index cf66a0d54c..4ac7f3d6de 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -913,7 +913,7 @@ static void dram_timing_regs(ramctr_timing * ctrl) // ODT stretch reg = 0; - cpures = cpuid(0); + cpures = cpuid(1); cpu = cpures.eax; if (IS_IVY_CPU(cpu) || (IS_SANDY_CPU(cpu) && IS_SANDY_CPU_D2(cpu))) { @@ -3779,7 +3779,7 @@ static void set_4f8c(void) struct cpuid_result cpures; u32 cpu; - cpures = cpuid(0); + cpures = cpuid(1); cpu = (cpures.eax); if (IS_SANDY_CPU(cpu) && (IS_SANDY_CPU_D0(cpu) || IS_SANDY_CPU_D1(cpu))) { MCHBAR32(0x4f8c) = 0x141D1519; |