diff options
| author | Furquan Shaikh <furquan@google.com> | 2014-09-30 19:49:01 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 08:45:08 +0100 |
| commit | c2115e3f383a0c5046f49497e1c48791b21d17d1 (patch) | |
| tree | aad22e1e8fd3f6c0e2b577904bb654bccf6ae7bd | |
| parent | d84db00e9520ce849af3d49240d620205f23a76f (diff) | |
tegra132: Replace use of clk_rst with CLK_RST_REG
Also, get rid of unused clk_rst variables.
BUG=None
BRANCH=None
TEST=Compiles successfully
Change-Id: I6487162454159a81b31fe0d6d39c2bdbed3f859a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 030081fe85fc9609fdf2003cf51b7350e08f0429
Original-Change-Id: I880ae5c396c33006f6b184cca7f171e4373f4016
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/220720
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9105
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/soc/nvidia/tegra132/bootblock.c | 2 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/i2c6.c | 1 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/include/soc/clock.h | 2 |
3 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c index 20a66a7b91..7afe7b556d 100644 --- a/src/soc/nvidia/tegra132/bootblock.c +++ b/src/soc/nvidia/tegra132/bootblock.c @@ -34,8 +34,6 @@ void __attribute__((weak)) bootblock_mainboard_early_init(void) /* Empty default implementation. */ } -static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; - void main(void) { // enable pinmux clamp inputs diff --git a/src/soc/nvidia/tegra132/i2c6.c b/src/soc/nvidia/tegra132/i2c6.c index 887e2bb4b5..e4fbd19f4e 100644 --- a/src/soc/nvidia/tegra132/i2c6.c +++ b/src/soc/nvidia/tegra132/i2c6.c @@ -31,7 +31,6 @@ #define DPAUX_HYBRID_PADCTL 0x545C0124 static struct tegra_pmc_regs * const pmc = (void *)TEGRA_PMC_BASE; -static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; static int partition_clamp_on(int id) { diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h index 51e4f5f80c..d93e7b657f 100644 --- a/src/soc/nvidia/tegra132/include/soc/clock.h +++ b/src/soc/nvidia/tegra132/include/soc/clock.h @@ -290,7 +290,7 @@ static inline void _clock_set_div(u32 *reg, const char *name, u32 div, #define CLK_DIV_MASK_I2C 0xffff #define clock_configure_source(device, src, freq) \ - _clock_set_div(&clk_rst->clk_src_##device, #device, \ + _clock_set_div(CLK_RST_REG(clk_src_##device), #device, \ get_clk_div(TEGRA_##src##_KHZ, freq), CLK_DIV_MASK, \ CLK_SRC_DEV_ID(device, src)) |