diff options
| author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-02-08 00:09:55 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-09 19:57:57 +0100 |
| commit | bb7dbcdf30ee9697dda0ae45025b4ea183b7a748 (patch) | |
| tree | bb22d11a052081a04cb3e4a5081758d0c9dca934 | |
| parent | 01586063ab0b65421678399256441d7a5190e169 (diff) | |
ASL: Use temporary variable when storing register into itself.
Otherwise it triggers a IASL warning with new IASL.
Change-Id: I090ee18df78ea779137ee6797c55b96ea27e6d27
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13623
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/mainboard/amd/dinar/dsdt.asl | 3 | ||||
| -rw-r--r-- | src/mainboard/amd/torpedo/dsdt.asl | 3 | ||||
| -rw-r--r-- | src/mainboard/hp/dl145_g1/dsdt.asl | 15 |
3 files changed, 14 insertions, 7 deletions
diff --git a/src/mainboard/amd/dinar/dsdt.asl b/src/mainboard/amd/dinar/dsdt.asl index c5dacefa6e..2c2ae76d93 100644 --- a/src/mainboard/amd/dinar/dsdt.asl +++ b/src/mainboard/amd/dinar/dsdt.asl @@ -802,7 +802,8 @@ DefinitionBlock ( } /* Arbitrarily clear PciExpWakeStatus */ - Store(PEWS, PEWS) + Store(PEWS, Local0) + Store(Local0, PEWS) /* if(DeRefOf(Index(WKST,0))) { * Store(0, Index(WKST,1)) diff --git a/src/mainboard/amd/torpedo/dsdt.asl b/src/mainboard/amd/torpedo/dsdt.asl index 8926966f63..2014a91f42 100644 --- a/src/mainboard/amd/torpedo/dsdt.asl +++ b/src/mainboard/amd/torpedo/dsdt.asl @@ -774,7 +774,8 @@ DefinitionBlock ( } /* Arbitrarily clear PciExpWakeStatus */ - Store(PEWS, PEWS) + Store(PEWS, Local0) + Store(Local0, PEWS) /* if(DeRefOf(Index(WKST,0))) { * Store(0, Index(WKST,1)) diff --git a/src/mainboard/hp/dl145_g1/dsdt.asl b/src/mainboard/hp/dl145_g1/dsdt.asl index 52a8784da5..9e131b5169 100644 --- a/src/mainboard/hp/dl145_g1/dsdt.asl +++ b/src/mainboard/hp/dl145_g1/dsdt.asl @@ -250,11 +250,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) Notify (\_SB.PWRB, 0x02) } } - Store (\_SB.PCI0.GSTS, \_SB.PCI0.GSTS) - Store (\_SB.PCI0.STMC, \_SB.PCI0.STMC) - Store (\_SB.PCI0.STC0, \_SB.PCI0.STC0) - Store (\_SB.PCI0.STC1, \_SB.PCI0.STC1) - Store (\_SB.PCI0.STHW, \_SB.PCI0.STHW) + Store (\_SB.PCI0.GSTS, Local0) + Store (Local0, \_SB.PCI0.GSTS) + Store (\_SB.PCI0.STMC, Local0) + Store (Local0, \_SB.PCI0.STMC) + Store (\_SB.PCI0.STC0, Local0) + Store (Local0, \_SB.PCI0.STC0) + Store (\_SB.PCI0.STC1, Local0) + Store (Local0, \_SB.PCI0.STC1) + Store (\_SB.PCI0.STHW, Local0) + Store (Local0, \_SB.PCI0.STHW) If (LEqual (Arg0, 0x03)) { // Wake from S3 state Notify (\_SB.PCI0.TP2P.USB0, 0x01) } |