diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-23 00:25:10 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-04 00:11:17 +0000 |
| commit | 9b57022ab479221a15a9b59a287709c495f02415 (patch) | |
| tree | bced9341cabf407e5fda5cf97624c67ec90251f8 | |
| parent | d328934c9b9d1454a83971182627565a5d116cb0 (diff) | |
mb/supermicro/x11ssm-f: correct trigger for SMI/NMI interrupt inputs
All four SMI/NMI interrupt inputs have an external pull-up resistor and
get triggered by pulling the line low. Thus, correct the trigger to
active-low.
Also document the signals by adding appropriate comments.
The pads' connections have been determined by dissecting a dead board.
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Id1a8c1e0b9fe723a15d04a88d565a53eeba9b085
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48093
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c index dc41573224..335171e446 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c @@ -80,13 +80,13 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_C19, NONE), PAD_NC(GPP_C20, NONE), PAD_NC(GPP_C21, NONE), - PAD_CFG_GPI_SMI(GPP_C22, UP_20K, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_SMI_LOW(GPP_C22, UP_20K, DEEP, EDGE_SINGLE), /* BMC SMI# */ PAD_NC(GPP_C23, NONE), /* GPIO Group GPP_D */ PAD_NC(GPP_D0, NONE), PAD_CFG_GPO_GPIO_DRIVER(GPP_D1, 1, DEEP, NONE), - PAD_CFG_GPI_NMI(GPP_D2, UP_20K, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_D2, UP_20K, DEEP, EDGE_SINGLE, INVERT), /* BMC NMI# */ PAD_NC(GPP_D3, NONE), PAD_CFG_GPO_GPIO_DRIVER(GPP_D4, 0, PLTRST, NONE), PAD_NC(GPP_D5, NONE), @@ -116,7 +116,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_E3, NONE), PAD_NC(GPP_E4, NONE), PAD_NC(GPP_E5, NONE), - PAD_CFG_GPI_NMI(GPP_E6, UP_20K, PLTRST, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_E6, UP_20K, PLTRST, EDGE_SINGLE, INVERT), /* NMI# (BMC WDT + JF1) */ PAD_NC(GPP_E7, NONE), PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), @@ -169,8 +169,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI_INT(GPP_G15, NONE, PLTRST, OFF), PAD_CFG_GPI_INT(GPP_G16, NONE, PLTRST, OFF), PAD_NC(GPP_G17, NONE), - PAD_CFG_NF(GPP_G18, NONE, DEEP, NF1), - PAD_CFG_NF(GPP_G19, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_G18, NONE, DEEP, NF1), /* BMC NMI# */ + PAD_CFG_NF(GPP_G19, NONE, DEEP, NF1), /* BMC SMI# */ PAD_NC(GPP_G20, NONE), PAD_NC(GPP_G21, NONE), PAD_NC(GPP_G22, NONE), |