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authorWisley Chen <wisley.chen@quantatw.com>2020-06-30 22:13:06 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-07-12 19:37:20 +0000
commit8b85e8152be0b0c3cd761d22a7a8bfa84c1eeace (patch)
tree9eb21e8930e7faaa7498223e85ead3776da2ddee
parenta339c3600fd013e3555498e53c4afab40af5f736 (diff)
mb/google/dedede/var/drawcia: support internal usb camera
BUG=b:160741778 TEST=build drawcia, and check camera can be regconized Change-Id: I67bee9773b53451653abd76088d1d4062fe3da8f Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42929 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/overridetree.cb14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
index 38690f7d6d..bc10e1ff2b 100644
--- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
@@ -1,5 +1,8 @@
chip soc/intel/jasperlake
+ # USB Port Configuration
+ register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
+
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
@@ -37,6 +40,17 @@ chip soc/intel/jasperlake
}"
device domain 0 on
+ device pci 14.0 on
+ chip drivers/usb/acpi
+ device usb 0.0 on
+ chip drivers/usb/acpi
+ register "desc" = ""Camera""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device usb 2.5 on end
+ end
+ end
+ end
+ end # USB xHCI
device pci 15.0 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""