nyan*: Clear VDDIO_SDMMC3 to reset SD card reader.

When across warm reset, if VDD_3V3_SD_CARD gets power-cycled but VDDIO_SDMMC3
does not, we will get ~1.5V leakage on VDD. To fix that, we reset VDDIO_SDMMC3
to 0 along with VDD_3V3_SD_CARD in Coreboot.  Payloads must turn on VDDIO_SDMMC3
explicitly before accessing SD card.

Note the warnings of "VDD_SDMMC must set early" in comment seems only happens on
U-Boot and can be removed.

BUG=chrome-os-partner:27053
BRNACH=nyan
TEST=Ctrl-U to boot from SD card, login and type "reboot", then Ctrl-U to boot
     again. Without this patch, system will fail in loading kernel.

Original-Change-Id: I7f85995317d18587d514ea3afcff3bfea0a33e93
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196961
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 2cfdb78d9dc229a3c06f19bbe137d59d923908a4)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ie7d814e0424478c35a56fbc959437ee6a555684a
Reviewed-on: http://review.coreboot.org/7866
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

3 files changed, 3 insertions, 30 deletions

diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c
index 7ec9290fd9..a6e881d10f 100644
--- a/src/mainboard/google/nyan/pmic.c
+++ b/src/mainboard/google/nyan/pmic.c
@@ -50,7 +50,7 @@ static struct as3722_init_reg init_list[] = {
 	{AS3722_LDO2, 0x10, 0},
 	{AS3722_LDO4, 0x00, 0},
 	{AS3722_LDO5, 0x00, 0},
-	{AS3722_LDO6, 0x3F, 0},
+	{AS3722_LDO6, 0x00, 0},
 	{AS3722_LDO7, 0x00, 0},
 	{AS3722_LDO9, 0x00, 0},
 	{AS3722_LDO10, 0x00, 0},
@@ -100,15 +100,6 @@ void pmic_init(unsigned bus)
 	pmic_write_reg(bus, 0x12, 0x10, 1);
 
 	/*
-	 * Bring up VDD_SDMMC via the AS3722 PMIC on the PWR I2C bus.
-	 * First set it to bypass 3.3V straight thru, then enable the regulator
-	 *
-	 * NOTE: We do this early because doing it later seems to hose the CPU
-	 * power rail/partition startup. Need to debug.
-	 */
-	pmic_write_reg(bus, 0x16, 0x3f, 1);
-
-	/*
 	 * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set
 	 * the value (register 0x20 bit 4)
 	 */
diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c
index 9f3f81a985..6bbff0da8b 100644
--- a/src/mainboard/google/nyan_big/pmic.c
+++ b/src/mainboard/google/nyan_big/pmic.c
@@ -50,7 +50,7 @@ static struct as3722_init_reg init_list[] = {
 	{AS3722_LDO2, 0x10, 0},
 	{AS3722_LDO4, 0x00, 0},
 	{AS3722_LDO5, 0x00, 0},
-	{AS3722_LDO6, 0x3F, 0},
+	{AS3722_LDO6, 0x00, 0},
 	{AS3722_LDO7, 0x00, 0},
 	{AS3722_LDO9, 0x00, 0},
 	{AS3722_LDO10, 0x00, 0},
@@ -98,15 +98,6 @@ void pmic_init(unsigned bus)
 	pmic_write_reg(bus, 0x12, 0x10, 1);
 
 	/*
-	 * Bring up VDD_SDMMC via the AS3722 PMIC on the PWR I2C bus.
-	 * First set it to bypass 3.3V straight thru, then enable the regulator
-	 *
-	 * NOTE: We do this early because doing it later seems to hose the CPU
-	 * power rail/partition startup. Need to debug.
-	 */
-	pmic_write_reg(bus, 0x16, 0x3f, 1);
-
-	/*
 	 * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set
 	 * the value (register 0x20 bit 4)
 	 */
diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c
index 9f3f81a985..6bbff0da8b 100644
--- a/src/mainboard/google/nyan_blaze/pmic.c
+++ b/src/mainboard/google/nyan_blaze/pmic.c
@@ -50,7 +50,7 @@ static struct as3722_init_reg init_list[] = {
 	{AS3722_LDO2, 0x10, 0},
 	{AS3722_LDO4, 0x00, 0},
 	{AS3722_LDO5, 0x00, 0},
-	{AS3722_LDO6, 0x3F, 0},
+	{AS3722_LDO6, 0x00, 0},
 	{AS3722_LDO7, 0x00, 0},
 	{AS3722_LDO9, 0x00, 0},
 	{AS3722_LDO10, 0x00, 0},
@@ -98,15 +98,6 @@ void pmic_init(unsigned bus)
 	pmic_write_reg(bus, 0x12, 0x10, 1);
 
 	/*
-	 * Bring up VDD_SDMMC via the AS3722 PMIC on the PWR I2C bus.
-	 * First set it to bypass 3.3V straight thru, then enable the regulator
-	 *
-	 * NOTE: We do this early because doing it later seems to hose the CPU
-	 * power rail/partition startup. Need to debug.
-	 */
-	pmic_write_reg(bus, 0x16, 0x3f, 1);
-
-	/*
 	 * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set
 	 * the value (register 0x20 bit 4)
 	 */