diff options
author | Warren Turkal <wt@penguintechs.org> | 2010-09-27 21:15:56 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-09-27 21:15:56 +0000 |
commit | 768d8ea09830a02fe815b8b60825430a3ec6a10a (patch) | |
tree | 9abe3deb45d68f88fff3d656b573a70c5d57f1ec | |
parent | 0e8f204277ac6af885a9e45ec569f1bcff89ebbf (diff) |
Move CAR config from mainboard to CPU config for AMD GX2 boards.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/cpu/amd/model_gx2/Kconfig | 13 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/Kconfig | 1 |
2 files changed, 8 insertions, 6 deletions
diff --git a/src/cpu/amd/model_gx2/Kconfig b/src/cpu/amd/model_gx2/Kconfig index 23c0ac75ea..4515a71c37 100644 --- a/src/cpu/amd/model_gx2/Kconfig +++ b/src/cpu/amd/model_gx2/Kconfig @@ -20,25 +20,27 @@ config CPU_AMD_GX2 bool +if CPU_AMD_GX2 + +config CPU_SPECIFIC_OPTIONS + def_bool y + select CACHE_AS_RAM + config DCACHE_RAM_BASE hex default 0xc8000 - depends on CPU_AMD_GX2 config DCACHE_RAM_SIZE hex default 0x04000 - depends on CPU_AMD_GX2 config GEODE_VSA bool default y - depends on CPU_AMD_GX2 select PCI_OPTION_ROM_RUN_REALMODE config GEODE_VSA_FILE bool "Add a VSA image" - depends on CPU_AMD_GX2 help Select this option if you have an AMD Geode GX2 vsa that you would like to add to your ROM. @@ -48,9 +50,10 @@ config GEODE_VSA_FILE config VSA_FILENAME string "AMD Geode GX2 VSA path and filename" - depends on GEODE_VSA_FILE && CPU_AMD_GX2 + depends on GEODE_VSA_FILE default "gpl_vsa_gx_102.bin" help The path and filename of the file to use as VSA. +endif # CPU_AMD_GX2 diff --git a/src/mainboard/wyse/s50/Kconfig b/src/mainboard/wyse/s50/Kconfig index 74efdf77bd..75b5335717 100644 --- a/src/mainboard/wyse/s50/Kconfig +++ b/src/mainboard/wyse/s50/Kconfig @@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select CACHE_AS_RAM select HAVE_PIRQ_TABLE select PIRQ_ROUTE select BOARD_ROMSIZE_KB_256 |