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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-10-02 16:12:00 -0600
committerMartin Roth <martinroth@google.com>2017-10-02 22:35:10 +0000
commit4dd2269f57bb5ee2d25bde65ad781d487b7a6e57 (patch)
tree86867199feec604cd463fbaedae4348579dee7f3
parent25cc76ff48d36f2718dbcce152424c60cda1ffc3 (diff)
amd/stoneyridge: Remove 16MB cbmem assert
Do not check for the top of memory being 16MB-aligned near the end of romstage. This is not the expected alignment using the default 8MB SMM region size. BUG=b:67320715 Change-Id: I6bf0b9141232dea1a3b02794fda7af08887df119 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21850 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
-rw-r--r--src/soc/amd/stoneyridge/romstage.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 8cd4d43942..a152c1f399 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -88,8 +88,6 @@ asmlinkage void car_stage_entry(void)
* 16 megs under cbmem top which is a safe bet to cover ramstage.
*/
top_of_ram = (uintptr_t) cbmem_top();
- /* cbmem_top() needs to be at least 16 MiB aligned */
- assert(ALIGN_DOWN(top_of_ram, 16*MiB) == top_of_ram);
postcar_frame_add_mtrr(&pcf, top_of_ram - 16*MiB, 16*MiB,
MTRR_TYPE_WRBACK);