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authorTristan Corrick <tristan@corrick.kiwi>2018-08-01 02:06:28 +1200
committerArthur Heymans <arthur@aheymans.xyz>2018-08-03 10:22:06 +0000
commit4505ab2a1ffeb86662c43f0fbcf7674254cf590b (patch)
treeb42fb60189fc0617163a751f7d52891d4c1d3b27
parentb3587a60ab5ab7ec00b1632013de3ac8b0aabed6 (diff)
superio/nuvoton/nct6776/acpi: Fix typo in comments
The constant used in the ACPI code is NCT6776_SHOW_KBC, so update the comments to reflect that. Change-Id: I9ba69384866088f84a516557d76864104a024968 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/27794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r--src/superio/nuvoton/nct6776/acpi/superio.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/superio/nuvoton/nct6776/acpi/superio.asl b/src/superio/nuvoton/nct6776/acpi/superio.asl
index 8e892e863a..b985115111 100644
--- a/src/superio/nuvoton/nct6776/acpi/superio.asl
+++ b/src/superio/nuvoton/nct6776/acpi/superio.asl
@@ -24,7 +24,7 @@
*
* LDN State
* 0x2 SP1 Implemented, untested
- * 0x5 KBCK Implemented, untested
+ * 0x5 KBC Implemented, untested
* 0x8 GPIO Implemented, untested
* 0xb HWM Implemented, untested
*
@@ -32,7 +32,7 @@
* SUPERIO_DEV Device identifier for this SIO (e.g. SIO0)
* SUPERIO_PNP_BASE I/O address of the first PnP configuration register
* NCT6776_SHOW_SP1 If defined, Serial Port 1 will be exposed.
- * NCT6776_SHOW_KBCK If defined, the Keyboard Controller will be exposed.
+ * NCT6776_SHOW_KBC If defined, the Keyboard Controller will be exposed.
* NCT6776_SHOW_GPIO If defined, GPIO support will be exposed.
* NCT6776_SHOW_HWM If defined, the Environment Controller will be exposed.
*/