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authorLee Leahy <leroy.p.leahy@intel.com>2016-09-28 17:16:44 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-09-30 01:16:51 +0200
commit44ec92a48d4dd40f9cca2da66e875d0665b57215 (patch)
tree831c5e45683575424fec5569d8d5943aa7a83f68
parent54f857b29e7d7fddf4ad2c13a16f624e25349456 (diff)
soc/intel/quark: Fix FSP 2.0 build
Fix the build issues with FSP 2.0: * Remove struct from the various data structures. * Properly display the serial port UPDs. * Change chipset_handle_reset parameter type BRANCH=none BUG=None TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug off) and run on Galileo Gen2 Change-Id: Icae578855006f18e7e5aa18d2fd196d300d0c658 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/soc/intel/quark/fsp2_0.c2
-rw-r--r--src/soc/intel/quark/reset.c2
-rw-r--r--src/soc/intel/quark/romstage/debug.c20
-rw-r--r--src/soc/intel/quark/romstage/fsp2_0.c6
4 files changed, 18 insertions, 12 deletions
diff --git a/src/soc/intel/quark/fsp2_0.c b/src/soc/intel/quark/fsp2_0.c
index deb933427d..2487cdebd3 100644
--- a/src/soc/intel/quark/fsp2_0.c
+++ b/src/soc/intel/quark/fsp2_0.c
@@ -16,7 +16,7 @@
#include <fsp/util.h>
#include <soc/ramstage.h>
-void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
+void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
{
}
diff --git a/src/soc/intel/quark/reset.c b/src/soc/intel/quark/reset.c
index e3d3fac79b..b5b86f3489 100644
--- a/src/soc/intel/quark/reset.c
+++ b/src/soc/intel/quark/reset.c
@@ -17,7 +17,7 @@
#include <fsp/util.h>
#include <reset.h>
-void chipset_handle_reset(enum fsp_status status)
+void chipset_handle_reset(uint32_t status)
{
/* Do a hard reset if Quark FSP ever requests a reset */
printk(BIOS_ERR, "Unknown reset type %x\n", status);
diff --git a/src/soc/intel/quark/romstage/debug.c b/src/soc/intel/quark/romstage/debug.c
index c08150e575..1029eadb93 100644
--- a/src/soc/intel/quark/romstage/debug.c
+++ b/src/soc/intel/quark/romstage/debug.c
@@ -16,11 +16,11 @@
#include <console/console.h>
#include <fsp/util.h>
-void soc_display_fspm_upd_params(const struct FSPM_UPD *fspm_old_upd,
- const struct FSPM_UPD *fspm_new_upd)
+void soc_display_fspm_upd_params(const FSPM_UPD *fspm_old_upd,
+ const FSPM_UPD *fspm_new_upd)
{
- const struct FSP_M_CONFIG *new;
- const struct FSP_M_CONFIG *old;
+ const FSP_M_CONFIG *new;
+ const FSP_M_CONFIG *old;
old = &fspm_old_upd->FspmConfig;
new = &fspm_new_upd->FspmConfig;
@@ -62,9 +62,15 @@ void soc_display_fspm_upd_params(const struct FSPM_UPD *fspm_old_upd,
old->RmuBaseAddress, new->RmuBaseAddress);
fsp_display_upd_value("RmuLength", sizeof(old->RmuLength),
old->RmuLength, new->RmuLength);
- fsp_display_upd_value("SerialPortBaseAddress",
- sizeof(old->SerialPortBaseAddress),
- old->SerialPortBaseAddress, new->SerialPortBaseAddress);
+ fsp_display_upd_value("SerialPortPollForChar",
+ sizeof(old->SerialPortPollForChar),
+ old->SerialPortPollForChar, new->SerialPortPollForChar);
+ fsp_display_upd_value("SerialPortReadChar",
+ sizeof(old->SerialPortReadChar),
+ old->SerialPortReadChar, new->SerialPortReadChar);
+ fsp_display_upd_value("SerialPortWriteChar",
+ sizeof(old->SerialPortWriteChar),
+ old->SerialPortWriteChar, new->SerialPortWriteChar);
fsp_display_upd_value("SmmTsegSize", sizeof(old->SmmTsegSize),
old->SmmTsegSize, new->SmmTsegSize);
fsp_display_upd_value("SocRdOdtVal", sizeof(old->SocRdOdtVal),
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index 51fcde71e5..d90bd38d85 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -87,14 +87,14 @@ int fill_power_state(void)
return ps->prev_sleep_state;
}
-void platform_fsp_memory_init_params_cb(struct FSPM_UPD *fspm_upd)
+void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd)
{
- struct FSPM_ARCH_UPD *aupd;
+ FSPM_ARCH_UPD *aupd;
const struct device *dev;
const struct soc_intel_quark_config *config;
char *rmu_file;
size_t rmu_file_len;
- struct FSP_M_CONFIG *upd;
+ FSP_M_CONFIG *upd;
/* Clear SMI and wake events */
clear_smi_and_wake_events();