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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-18 21:50:50 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-19 19:48:40 +0100 |
| commit | 3165c46f451ccc2e223167aba84343cf8f269e35 (patch) | |
| tree | f6c4f735d3c510236031ac07f43e6c49afe47a53 | |
| parent | 36b93653e1b499e77bb42d93023091d1d9a42cc4 (diff) | |
intel/truxton: Add dummy cache-as-ram region
Board has no chance of working without a cache_as_ram.inc, but without
a specified CAR region we also break builds.
Change-Id: I98e9db38c5e0a7bf4a1b8d2f8a693cc8d0c773b9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7863
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/cpu/intel/ep80579/Kconfig | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig index 530c48f0e8..ec584288bf 100644 --- a/src/cpu/intel/ep80579/Kconfig +++ b/src/cpu/intel/ep80579/Kconfig @@ -5,3 +5,19 @@ config CPU_INTEL_EP80579 select ARCH_RAMSTAGE_X86_32 select SSE select SUPPORT_CPU_UCODE_IN_CBFS + select BROKEN_CAR_MIGRATE + +if CPU_INTEL_EP80579 + +# These are just dummy values to keep build happy. +# This CPU does not have tested cache_as_ram.inc. + +config DCACHE_RAM_BASE + hex + default 0xffaf8000 + +config DCACHE_RAM_SIZE + hex + default 0x8000 + +endif |