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authorPaul Menzel <pmenzel@molgen.mpg.de>2020-10-06 09:01:30 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-17 13:54:17 +0000
commit227225b4ac46e085d72d51e698aecd73159e1f18 (patch)
treee1505f5635d11bb2f230c15c90a823b8ca637d28
parent30935b60389a8cf264226b3885f37dda8d98fe2b (diff)
mb: AMD CIMx boards: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is *defined* in this case. Fix all occurrences in AMD vendor code with the command below. git grep -l "is define at" src/mainboard/ | xargs sed -i 's/is define at/is defined at/' Change-Id: I5aa0e6e064410b305aa5f2775271f6a8988da64b Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46066 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/amd/inagua/platform_cfg.h22
-rw-r--r--src/mainboard/amd/persimmon/platform_cfg.h22
-rw-r--r--src/mainboard/amd/south_station/platform_cfg.h22
-rw-r--r--src/mainboard/amd/union_station/platform_cfg.h22
-rw-r--r--src/mainboard/asrock/e350m1/platform_cfg.h22
-rw-r--r--src/mainboard/elmex/pcm205400/platform_cfg.h22
-rw-r--r--src/mainboard/gizmosphere/gizmo/platform_cfg.h22
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h22
-rw-r--r--src/mainboard/lippert/frontrunner-af/platform_cfg.h22
-rw-r--r--src/mainboard/pcengines/apu1/platform_cfg.h22
10 files changed, 110 insertions, 110 deletions
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h
index 38447ac9b7..85a60e251b 100644
--- a/src/mainboard/amd/inagua/platform_cfg.h
+++ b/src/mainboard/amd/inagua/platform_cfg.h
@@ -36,13 +36,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h
index d472ad036b..32c22bcfa1 100644
--- a/src/mainboard/amd/persimmon/platform_cfg.h
+++ b/src/mainboard/amd/persimmon/platform_cfg.h
@@ -36,13 +36,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h
index 38447ac9b7..85a60e251b 100644
--- a/src/mainboard/amd/south_station/platform_cfg.h
+++ b/src/mainboard/amd/south_station/platform_cfg.h
@@ -36,13 +36,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h
index 38447ac9b7..85a60e251b 100644
--- a/src/mainboard/amd/union_station/platform_cfg.h
+++ b/src/mainboard/amd/union_station/platform_cfg.h
@@ -36,13 +36,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h
index 6d3ea82233..6994575985 100644
--- a/src/mainboard/asrock/e350m1/platform_cfg.h
+++ b/src/mainboard/asrock/e350m1/platform_cfg.h
@@ -36,13 +36,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/elmex/pcm205400/platform_cfg.h b/src/mainboard/elmex/pcm205400/platform_cfg.h
index b621f60b81..7926249ff0 100644
--- a/src/mainboard/elmex/pcm205400/platform_cfg.h
+++ b/src/mainboard/elmex/pcm205400/platform_cfg.h
@@ -37,13 +37,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
index 2ea529ffcc..af7da08234 100644
--- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h
+++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
@@ -40,13 +40,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -143,13 +143,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
index bacb7b11aa..9c8d0f6e47 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
@@ -37,13 +37,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
diff --git a/src/mainboard/lippert/frontrunner-af/platform_cfg.h b/src/mainboard/lippert/frontrunner-af/platform_cfg.h
index 9f51c40462..ba6f0bb0cf 100644
--- a/src/mainboard/lippert/frontrunner-af/platform_cfg.h
+++ b/src/mainboard/lippert/frontrunner-af/platform_cfg.h
@@ -37,13 +37,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF)
#define USB_CONFIG 0x3F
@@ -148,13 +148,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
#if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF)
#define AZALIA_SDIN_PIN 0x02
diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h
index ef6f5baeaa..44172f67d6 100644
--- a/src/mainboard/pcengines/apu1/platform_cfg.h
+++ b/src/mainboard/pcengines/apu1/platform_cfg.h
@@ -39,13 +39,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -141,13 +141,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A