diff options
| author | Martin Roth <martinroth@chromium.org> | 2021-08-11 13:27:45 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-30 18:54:16 +0000 |
| commit | fd078d85d01810a4f03a8c21d454c04d9e2d3ae4 (patch) | |
| tree | 7689d939d1ee14f24ccbcd2be1701bdeaeb0cbe4 | |
| parent | e582e710b8ed6315a2a62b8c6d745af218d434cb (diff) | |
soc/amd: Show SPI settings in bootblock
BUG=b:194919326
TEST=See SPI settings in bootblock
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I8ee8981986990240b09414cde8b84d9b109cb5b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/early_fch.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 9da154cd2b..16a8a53c75 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -73,6 +73,7 @@ void fch_early_init(void) pm_set_power_failure_state(); fch_print_pmxc0_status(); i2c_soc_early_init(); + show_spi_speeds_and_modes(); if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING)) lpc_disable_spi_rom_sharing(); diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index 88011c1fc3..110718e2e1 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -75,6 +75,7 @@ void fch_early_init(void) pm_set_power_failure_state(); fch_print_pmxc0_status(); i2c_soc_early_init(); + show_spi_speeds_and_modes(); if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING)) lpc_disable_spi_rom_sharing(); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 5f5fc72bfc..7493770fac 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -357,6 +357,7 @@ void bootblock_fch_init(void) { pm_set_power_failure_state(); fch_print_pmxc0_status(); + show_spi_speeds_and_modes(); } static void fch_init_acpi_ports(void) |