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authorSridhar Siricilla <sridhar.siricilla@intel.com>2022-01-26 00:28:10 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-04-06 17:34:11 +0000
commitfad76f33a9be2b629266f4f4276345970a1b6ebd (patch)
treeeffd5d85793a5771cd2e6f51b3630b2d023c716d
parentf5e94b6e7283794bad7a0c527c6c75dc92d6f460 (diff)
mb/google/brya: Enable dynamic debug capability for brya family
The patch enables dynamic debug capability for Brya family of boards. BRANCH=MAIN BUG=b:153410586 TEST= Verified the CSE firmware update functionality on Brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I51b0e0bb4392d3fbdb50577d3644491ab90a33c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
-rw-r--r--src/mainboard/google/brya/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index b501754fe8..1fb90c98c7 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -36,6 +36,7 @@ config BOARD_GOOGLE_BRYA_COMMON
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_CSE_LITE_SKU
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES if SOC_INTEL_ALDERLAKE_PCH_P
+ select SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE
config BOARD_GOOGLE_BASEBOARD_BRYA
def_bool n