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authorElyes HAOUAS <ehaouas@noos.fr>2022-01-27 14:27:05 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-01-28 17:55:21 +0000
commitfa99982b71fd73e0654a499c92965a4bfc8805dd (patch)
treed04a761f131c6094c5438fc6eb3a9cd1cfdb8373
parent3b6d202ee5ff944f418258cfe327e4d1d806e618 (diff)
soc/intel/xeon_sp/nb_acpi.c: Drop comparison to true
Change-Id: Ib9670ee22e36dd988a75b2f8dc565534927b6107 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61422 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
-rw-r--r--src/soc/intel/xeon_sp/nb_acpi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c
index 9443966237..bb98f0b5fb 100644
--- a/src/soc/intel/xeon_sp/nb_acpi.c
+++ b/src/soc/intel/xeon_sp/nb_acpi.c
@@ -167,7 +167,7 @@ static unsigned long acpi_create_dmar_ds_pci_br_for_port(unsigned long current,
unsigned long atsr_size = 0;
unsigned long pci_br_size = 0;
- if (is_atsr == true && first && *first == true) {
+ if (is_atsr && first && *first) {
printk(BIOS_DEBUG, "[Root Port ATS Capability] Flags: 0x%x, "
"PCI Segment Number: 0x%x\n", 0, pcie_seg);
atsr_size = acpi_create_dmar_atsr(current, 0, pcie_seg);