diff options
| author | Varshit Pandya <pandyavarshit@gmail.com> | 2023-12-18 23:02:31 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-20 14:12:16 +0000 |
| commit | f86375fd889d5231cd05bc1cbaa535cb80330e5b (patch) | |
| tree | eec69338fba51757053396e06f89361a239b081a | |
| parent | 68a4c2ae8dd42064955d8e7e7549876d63ae05bc (diff) | |
mb/amd/onyx_poc/devicetree: Enable UART1
UART1 is selected for debug uart in Kconfig, it also needs to enabled
in devicetree. With this serial output doesn't stop during the device
enable step.
TEST:Build onyx_poc board
Change-Id: I7c910301c6eca5d3057785607139ac03b344bc15
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79643
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/mainboard/amd/onyx_poc/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/amd/onyx_poc/devicetree.cb b/src/mainboard/amd/onyx_poc/devicetree.cb index a18eff40da..27a22c6501 100644 --- a/src/mainboard/amd/onyx_poc/devicetree.cb +++ b/src/mainboard/amd/onyx_poc/devicetree.cb @@ -200,4 +200,6 @@ chip soc/amd/genoa_poc end end + device ref uart_1 on end + end |