diff options
author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-11-04 11:57:23 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-08 14:09:44 +0000 |
commit | f5ead3f029c9a7d1edfad171dd4df333491dc450 (patch) | |
tree | 8e01c48b28b6a3a14a24fb0bf37223d9782bda08 | |
parent | 9429844f816c7ed544e8ffeb6f23294213eb85c2 (diff) |
mb/google/brya/var/kinox: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for kinox board. Please refer Intel doc#723158 for more
information.
BUG=b:257373738
TEST=Verify the build for kinox board
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ifcf4f89ea4c61ec4f9a31edba069d2111ca06010
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
-rw-r--r-- | src/mainboard/google/brya/variants/kinox/overridetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb index 8356320eaf..01610c12ba 100644 --- a/src/mainboard/google/brya/variants/kinox/overridetree.cb +++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb @@ -12,6 +12,10 @@ chip soc/intel/alderlake # GPE configuration register "pmc_gpe0_dw1" = "GPP_H" + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |