diff options
| author | chn <chn@virtutech.se> | 2006-12-14 00:43:50 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2006-12-14 00:43:50 +0000 |
| commit | f3938bbbbfc59042c014910ed93e939185d511a8 (patch) | |
| tree | 6a22867900341b6eb246d6c343e7f6a3ce6c154f | |
| parent | a522df039b3085004dbff39fec675039d57b1fab (diff) | |
In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/o
space offset 0x1000, and later is the acpi registers also mapped at 0x1000.
This patch fixes this behavior. Closes #44
Signed-off-by: <chn@virtutech.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2523 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/southbridge/intel/i82801ca/i82801ca_lpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801ca/i82801ca_lpc.c b/src/southbridge/intel/i82801ca/i82801ca_lpc.c index 99d6803931..07f88f2f6d 100644 --- a/src/southbridge/intel/i82801ca/i82801ca_lpc.c +++ b/src/southbridge/intel/i82801ca/i82801ca_lpc.c @@ -121,8 +121,8 @@ void i82801ca_1f0_misc(struct device *dev) // Prevent LPC disabling, enable parity errors, and SERR# (System Error) pci_write_config16(dev, PCI_COMMAND, 0x014f); - // Set ACPI base address to 0x1000 (I/O space) - pci_write_config32(dev, PMBASE, 0x00001001); + // Set ACPI base address to 0x1100 (I/O space) + pci_write_config32(dev, PMBASE, 0x00001101); // Enable ACPI I/O and power management pci_write_config8(dev, ACPI_CNTL, 0x10); |