mb/intel/tglrvp/dt: Make use of device alias names

Also, remove superfluous comments from devices which repeat their name.

Change-Id: I009330042b59c9e6e78aa6f3819546b771b26ff0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83244
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>

2 files changed, 142 insertions, 145 deletions

diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index 6a7db5f24d..f03f67734c 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -162,10 +162,9 @@ chip soc/intel/tigerlake
 	}"
 
 	device domain 0 on
-		#From EDS(575683)
-		device pci 00.0 on  end # Host Bridge		0x9A14:U/0x9A12:Y
-		device pci 02.0 on  end # Graphics
-		device pci 04.0 on
+		device ref system_agent on  end
+		device ref igpu on  end
+		device ref dptf on
 			# Default DPTF Policy for all tglrvp_up3 boards if not overridden
 			chip drivers/intel/dptf
 				register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 1000)"
@@ -186,45 +185,44 @@ chip soc/intel/tigerlake
 					.granularity = 1000,}"
 				device generic 0 on end
 			end
-		end # DPTF	0x9A04:U22/0x9A14:U42
+		end
 
-		device pci 05.0 on  end # IPU			0x9A19
-		device pci 06.0 on  end # PEG60			0x9A09
-		device pci 07.0 on  end # TBT_PCIe0		0x9A23
-		device pci 07.1 on  end # TBT_PCIe1		0x9A25
-		device pci 07.2 on  end # TBT_PCIe2		0x9A27
-		device pci 07.3 on  end # TBT_PCIe3		0x9A29
-		device pci 08.0 off end # GNA			0x9A11
-		device pci 09.0 off end # NPK			0x9A33
-		device pci 0a.0 off end # Crash-log SRAM	0x9A0D
-		device pci 0d.0 on  end # USB xHCI		0x9A13
-		device pci 0d.1 on  end # USB xDCI (OTG)	0x9A15
-		device pci 0d.2 on  end # TBT DMA0		0x9A1B
-		device pci 0d.3 on  end # TBT DMA1		0x9A1D
-		device pci 0e.0 off end # VMD			0x9A0B
+		device ref ipu on  end
+		device ref peg on  end
+		device ref tbt_pcie_rp0 on  end
+		device ref tbt_pcie_rp1 on  end
+		device ref tbt_pcie_rp2 on  end
+		device ref tbt_pcie_rp3 on  end
+		device ref gna off end
+		device ref npk off end
+		device ref crashlog off end
+		device ref north_xhci on  end
+		device ref north_xdci on  end
+		device ref tbt_dma0 on  end
+		device ref tbt_dma1 on  end
+		device ref vmd off end
 
-		# From PCH EDS(576591)
-		device pci 10.6 off end # THC0			0xA0D0
-		device pci 10.7 off end # THC1			0xA0D1
-		device pci 12.0 on      # SensorHUB		0xA0FC
+		device ref thc0 off end
+		device ref thc1 off end
+		device ref ish on
 			chip drivers/intel/ish
 				register "firmware_name" = ""tglrvp_ish.bin""
 				device generic 0 on end
 			end
 		end
-		device pci 12.6 off end # GSPI2			0x34FB
-		device pci 13.0 off end # GSPI3			0xA0FD
-		device pci 14.0 on  end # USB3.1 xHCI		0xA0ED
-		device pci 14.1 on  end # USB3.1 xDCI		0xA0EE
-		device pci 14.2 on  end # Shared RAM		0xA0EF
-		device pci 14.3 on
+		device ref gspi2 off end
+		device ref gspi3 off end
+		device ref south_xhci on  end
+		device ref south_xdci on  end
+		device ref shared_ram on  end
+		device ref cnvi_wifi on
 			chip drivers/wifi/generic
 				register "wake" = "GPE0_PME_B0"
 				device generic 0 on end
 			end
-		end # CNVi: WiFi		0xA0F0 - A0F3
+		end
 
-		device pci 15.0 on	# I2C0			0xA0E8
+		device ref i2c0 on
 			chip drivers/i2c/generic
 				register "hid" = ""10EC1308""
 				register "name" = ""RTAM""
@@ -259,58 +257,58 @@ chip soc/intel/tigerlake
 				register "property_list[0].integer" = "1"
 				device i2c 1a on end
 			end
-		end	# I2C0
-		device pci 15.1 on  end # I2C1			0xA0E9
-		device pci 15.2 on  end # I2C2			0xA0EA
-		device pci 15.3 on  end # I2C3			0xA0EB
-		device pci 16.0 on  end # HECI1			0xA0E0
-		device pci 16.1 off end # HECI2			0xA0E1
-		device pci 16.2 off end # CSME			0xA0E2
-		device pci 16.3 off end # CSME			0xA0E3
-		device pci 16.4 off end # HECI3			0xA0E4
-		device pci 16.5 off end # HECI4			0xA0E5
-		device pci 17.0 on  end # SATA			0xA0D3
-		device pci 19.0 off end # I2C4			0xA0C5
-		device pci 19.1 on  end # I2C5			0xA0C6
-		device pci 19.2 on  end # UART2			0xA0C7
-		device pci 1c.0 off end # RP1			0xA0B8
-		device pci 1c.1 off end # RP2			0xA0B9
-		device pci 1c.2 on  end # RP3			0xA0BA
-		device pci 1c.3 on
+		end
+		device ref i2c1 on  end
+		device ref i2c2 on  end
+		device ref i2c3 on  end
+		device ref heci1 on  end
+		device ref heci2 off end
+		device ref csme1 off end
+		device ref csme2 off end
+		device ref heci3 off end
+		device ref heci4 off end
+		device ref sata on  end
+		device ref i2c4 off end
+		device ref i2c5 on  end
+		device ref uart2 on  end
+		device ref pcie_rp1 off end
+		device ref pcie_rp2 off end
+		device ref pcie_rp3 on  end
+		device ref pcie_rp4 on
 			chip soc/intel/common/block/pcie/rtd3
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B17)"
 				register "srcclk_pin" = "2"
 				device generic 0 on end
 			end
-		end # RP4					0xA0BB
-		device pci 1c.4 off end # RP5			0xA0BC
-		device pci 1c.5 off end # RP6			0xA0BD
-		device pci 1c.6 off end # RP7			0xA0BE
-		device pci 1c.7 off end # RP8			0xA0BF
-		device pci 1d.0 on  end # RP9			0xA0B0
-		device pci 1d.1 off end # RP10			0xA0B1
-		device pci 1d.2 on  end # RP11			0xA0B2
-		device pci 1d.3 off end # RP12			0xA0B3
-		device pci 1e.0 off end # UART0			0xA0A8
-		device pci 1e.1 off end # UART1			0xA0A9
-		device pci 1e.2 on end # GSPI0			0xA0AA
-		device pci 1e.3 on
+		end
+		device ref pcie_rp5 off end
+		device ref pcie_rp6 off end
+		device ref pcie_rp7 off end
+		device ref pcie_rp8 off end
+		device ref pcie_rp9 on  end
+		device ref pcie_rp10 off end
+		device ref pcie_rp11 on  end
+		device ref pcie_rp12 off end
+		device ref uart0 off end
+		device ref uart1 off end
+		device ref gspi0 on end
+		device ref gspi1 on
 			chip drivers/spi/acpi
 				register "hid" = "ACPI_DT_NAMESPACE_HID"
 				register "compat_string" = ""google,cr50""
 				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C22_IRQ)"
 				device spi 0 on end
 			end
-		end # GSPI1					0xA0AB
-		device pci 1f.0 on
+		end
+		device ref pch_espi on
 			chip ec/google/chromeec
 				use conn0 as mux_conn[0]
 				use conn1 as mux_conn[1]
 				device pnp 0c09.0 on end
 			end
-		end # eSPI                                      0xA080 - A09F
-		device pci 1f.1 on  end # P2SB			0xA0A0
-		device pci 1f.2 hidden  # PMC			0xA0A1
+		end
+		device ref p2sb on  end
+		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the
 			# PMC.MUX device in the ACPI hierarchy.
 			chip drivers/intel/pmc_mux
@@ -331,11 +329,11 @@ chip soc/intel/tigerlake
 					end
 				end
 			end
-		end # PMC
-		device pci 1f.3 on  end # Intel HD audio	0xA0C8-A0CF
-		device pci 1f.4 on  end # SMBus			0xA0A3
-		device pci 1f.5 on  end # SPI			0xA0A4
-		device pci 1f.6 off end # GbE			0x15E1/0x15E2
-		device pci 1f.7 off end # TH			0xA0A6
+		end
+		device ref hda on  end
+		device ref smbus on  end
+		device ref fast_spi on  end
+		device ref gbe off end
+		device ref tracehub off end
 	end
 end
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 5960a3c752..03e9c2d982 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -167,9 +167,9 @@ chip soc/intel/tigerlake
 
 	device domain 0 on
 		#From EDS(575683)
-		device pci 00.0 on  end # Host Bridge		0x9A14:U/0x9A12:Y
-		device pci 02.0 on  end # Graphics
-		device pci 04.0 on
+		device ref system_agent on  end
+		device ref igpu on  end
+		device ref dptf on
 			# Default DPTF Policy for all tglrvp_up4 boards if not overridden
 			chip drivers/intel/dptf
 				register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 1000)"
@@ -190,45 +190,44 @@ chip soc/intel/tigerlake
 					.granularity = 1000,}"
 				device generic 0 on end
 			end
-		end # DPTF	0x9A02:Y22/0x9A12:Y42
+		end
 
-		device pci 05.0 on  end # IPU			0x9A19
-		device pci 06.0 on  end # PEG60			0x9A09
-		device pci 07.0 on  end # TBT_PCIe0		0x9A23
-		device pci 07.1 on  end # TBT_PCIe1		0x9A25
-		device pci 07.2 on  end # TBT_PCIe2		0x9A27
-		device pci 07.3 off end # TBT_PCIe3		0x9A29
-		device pci 08.0 off end # GNA			0x9A11
-		device pci 09.0 off end # NPK			0x9A33
-		device pci 0a.0 off end # Crash-log SRAM	0x9A0D
-		device pci 0d.0 on  end # USB xHCI		0x9A13
-		device pci 0d.1 on  end # USB xDCI (OTG)	0x9A15
-		device pci 0d.2 on  end # TBT DMA0		0x9A1B
-		device pci 0d.3 on  end # TBT DMA1		0x9A1D
-		device pci 0e.0 off end # VMD			0x9A0B
+		device ref ipu on  end
+		device ref peg on  end
+		device ref tbt_pcie_rp0 on  end
+		device ref tbt_pcie_rp1 on  end
+		device ref tbt_pcie_rp2 on  end
+		device ref tbt_pcie_rp3 off end
+		device ref gna off end
+		device ref npk off end
+		device ref crashlog off end
+		device ref north_xhci on  end
+		device ref north_xdci on  end
+		device ref tbt_dma0 on  end
+		device ref tbt_dma1 on  end
+		device ref vmd off end
 
-		# From PCH EDS(576591)
-		device pci 10.6 off end # THC0			0xA0D0
-		device pci 10.7 off end # THC1			0xA0D1
-		device pci 12.0 on      # SensorHUB		0xA0FC
+		device ref thc0 off end
+		device ref thc1 off end
+		device ref ish on
 			chip drivers/intel/ish
 				register "firmware_name" = ""tglrvp_ish.bin""
 				device generic 0 on end
 			end
 		end
-		device pci 12.6 off end # GSPI2			0x34FB
-		device pci 13.0 off end # GSPI3			0xA0FD
-		device pci 14.0 on  end # USB3.1 xHCI		0xA0ED
-		device pci 14.1 on  end # USB3.1 xDCI		0xA0EE
-		device pci 14.2 on  end # Shared RAM		0xA0EF
-		device pci 14.3 on
+		device ref gspi2 off end
+		device ref gspi3 off end
+		device ref south_xhci on  end
+		device ref south_xdci on  end
+		device ref shared_ram on  end
+		device ref cnvi_wifi on
 			chip drivers/wifi/generic
 				register "wake" = "GPE0_PME_B0"
 				device generic 0 on end
 			end
-		end # CNVi: WiFi		0xA0F0 - A0F3
+		end
 
-		device pci 15.0 on	# I2C0			0xA0E8
+		device ref i2c0 on
 			chip drivers/i2c/generic
 				register "hid" = ""10EC1308""
 				register "name" = ""RTAM""
@@ -263,58 +262,58 @@ chip soc/intel/tigerlake
 				register "property_list[0].integer" = "1"
 				device i2c 1a on end
 			end
-		end	# I2C0
-		device pci 15.1 on  end # I2C1			0xA0E9
-		device pci 15.2 on  end # I2C2			0xA0EA
-		device pci 15.3 on  end # I2C3			0xA0EB
-		device pci 16.0 on  end # HECI1			0xA0E0
-		device pci 16.1 off end # HECI2			0xA0E1
-		device pci 16.2 off end # CSME			0xA0E2
-		device pci 16.3 off end # CSME			0xA0E3
-		device pci 16.4 off end # HECI3			0xA0E4
-		device pci 16.5 off end # HECI4			0xA0E5
-		device pci 17.0 on  end # SATA			0xA0D3
-		device pci 19.0 off end # I2C4			0xA0C5
-		device pci 19.1 on  end # I2C5			0xA0C6
-		device pci 19.2 on  end # UART2			0xA0C7
-		device pci 1c.0 off end # RP1			0xA0B8
-		device pci 1c.1 off end # RP2			0xA0B9
-		device pci 1c.2 on  end # RP3			0xA0BA
-		device pci 1c.3 on
+		end
+		device ref i2c1 on  end
+		device ref i2c2 on  end
+		device ref i2c3 on  end
+		device ref heci1 on  end
+		device ref heci2 off end
+		device ref csme1 off end
+		device ref csme2 off end
+		device ref heci3 off end
+		device ref heci4 off end
+		device ref sata on  end
+		device ref i2c4 off end
+		device ref i2c5 on  end
+		device ref uart2 on  end
+		device ref pcie_rp1 off end
+		device ref pcie_rp2 off end
+		device ref pcie_rp3 on  end
+		device ref pcie_rp4 on
 			chip soc/intel/common/block/pcie/rtd3
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B17)"
 				register "srcclk_pin" = "2"
 				device generic 0 on end
 			end
-		end # RP4					0xA0BB
-		device pci 1c.4 off end # RP5			0xA0BC
-		device pci 1c.5 off end # RP6			0xA0BD
-		device pci 1c.6 off end # RP7			0xA0BE
-		device pci 1c.7 off end # RP8			0xA0BF
-		device pci 1d.0 on  end # RP9			0xA0B0
-		device pci 1d.1 off end # RP10			0xA0B1
-		device pci 1d.2 on  end # RP11			0xA0B2
-		device pci 1d.3 off end # RP12			0xA0B3
-		device pci 1e.0 off end # UART0			0xA0A8
-		device pci 1e.1 off end # UART1			0xA0A9
-		device pci 1e.2 on end # GSPI0			0xA0AA
-		device pci 1e.3 on
+		end
+		device ref pcie_rp5 off end
+		device ref pcie_rp6 off end
+		device ref pcie_rp7 off end
+		device ref pcie_rp8 off end
+		device ref pcie_rp9 on  end
+		device ref pcie_rp10 off end
+		device ref pcie_rp11 on  end
+		device ref pcie_rp12 off end
+		device ref uart0 off end
+		device ref uart1 off end
+		device ref gspi0 on end
+		device ref gspi1 on
 			chip drivers/spi/acpi
 				register "hid" = "ACPI_DT_NAMESPACE_HID"
 				register "compat_string" = ""google,cr50""
 				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C22_IRQ)"
 				device spi 0 on end
 			end
-		end # GSPI1					0xA0AB
-		device pci 1f.0 on
+		end
+		device ref pch_espi on
 			chip ec/google/chromeec
 				use conn0 as mux_conn[0]
 				use conn1 as mux_conn[1]
 				device pnp 0c09.0 on end
 			end
-		end # eSPI                                      0xA080 - A09F
-		device pci 1f.1 on  end # P2SB			0xA0A0
-		device pci 1f.2 hidden  # PMC                   0xA0A1
+		end
+		device ref p2sb on  end
+		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the
 			# PMC.MUX device in the ACPI hierarchy.
 			chip drivers/intel/pmc_mux
@@ -335,11 +334,11 @@ chip soc/intel/tigerlake
 					end
 				end
 			end
-		end # PMC
-		device pci 1f.3 on  end # Intel HD audio	0xA0C8-A0CF
-		device pci 1f.4 on  end # SMBus			0xA0A3
-		device pci 1f.5 on  end # SPI			0xA0A4
-		device pci 1f.6 off end # GbE			0x15E1/0x15E2
-		device pci 1f.7 off end # TH			0xA0A6
+		end
+		device ref hda on  end
+		device ref smbus on  end
+		device ref fast_spi on  end
+		device ref gbe off end
+		device ref tracehub off end
 	end
 end