diff options
| author | Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> | 2018-04-12 10:13:43 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-17 10:42:46 +0000 |
| commit | f03c63ef956b53c691567e0bc3a4b61357155755 (patch) | |
| tree | 09ad4139129329c6036e3c1f69f54e6a6981e4fe | |
| parent | efeb6903fe08cd043dcd029d1c492be51f78aa50 (diff) | |
soc/intel/apollolake: Configure PCIe root port #3 for GLK WiFi
GLK Octopus uses PCIe root port #3 (PCIe ID 13.0) for discrete PCIe
wifi card.
BUG=None
BRANCH=None
TEST=Use Stone Peak discrete wifi card and test s0ix.
Change-Id: I8a064c5d97e4765bd97ec560c89b207b574b1fa1
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/25638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/soc/intel/apollolake/acpi/pcie.asl | 10 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 2 |
2 files changed, 11 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/acpi/pcie.asl b/src/soc/intel/apollolake/acpi/pcie.asl index da9959123a..539ae9b71e 100644 --- a/src/soc/intel/apollolake/acpi/pcie.asl +++ b/src/soc/intel/apollolake/acpi/pcie.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2016 Intel Corporation. + * Copyright (C) 2016 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,3 +22,11 @@ Device (RP01) #include "pcie_port.asl" } + +Device (RP03) +{ + Name (_ADR, 0x00130000) + Name (_DDN, "PCIe-A 0") + + #include "pcie_port.asl" +} diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 79374cadd1..c563f54438 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -111,6 +111,8 @@ static const char *soc_acpi_name(const struct device *dev) case PCH_DEVFN_SDIO: return "SDIO"; /* PCIe */ + case PCH_DEVFN_PCIE1: + return "RP03"; case PCH_DEVFN_PCIE5: return "RP01"; } |