soc/intel/common/pch: Decouple CLIENT from BASE

In preparation to add a third option, have "Client" platforms select a
dedicated Kconfig option instead of the common "_BASE" option. Rewrite
the help texts to clarify what "Client" and "Server" mean, because the
terms refer to the type of silicon and not to the market segment. Some
uniprocessor (single-socket) servers are actually client platforms and
there are some multi-socket workstations based on a server platform.

Change-Id: I646729d709f60ca2b5e74df18c2b4e52f9b10e6b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>

10 files changed, 27 insertions, 26 deletions

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 4406b3e65a..adb6a4355f 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -112,7 +112,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_BASECODE
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_CSE_SEND_EOP_EARLY
 	select SOC_INTEL_CSE_SET_EOP
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index cad2e752b8..c0f543e29a 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -105,7 +105,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_FSP_RESET
 	select SOC_INTEL_COMMON_NHLT
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
 	select SSE2
diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig
index 56471c39db..f46b95dec9 100644
--- a/src/soc/intel/common/pch/Kconfig
+++ b/src/soc/intel/common/pch/Kconfig
@@ -1,28 +1,32 @@
-config SOC_INTEL_COMMON_PCH_BASE
+config SOC_INTEL_COMMON_PCH_CLIENT
 	bool
-	depends on SOC_INTEL_COMMON_BLOCK
+	select SOC_INTEL_COMMON_PCH_BASE
 	help
-	  All common PCH code blocks between Gen-6 till latest-PCH should be
-	  part of this directory. A SoC Kconfig might select this option to include
-	  base PCH package while building new SOC block. Currently majority of
-	  common IP code blocks are part of soc/intel/common/block/ and
-	  SoC Kconfig just select those Kconfig option. Addition to that SoC
-	  code now having option to select required base PCH block to include
-	  common IP block.
+	  Selected by "Client" platforms, i.e. desktops, workstations,
+	  laptops, tablets... This also includes uniprocessor servers
+	  based on the same silicon as desktops and workstations. The
+	  "Client" platforms include additional IP blocks that are of
+	  little to no use on servers.
 
 config SOC_INTEL_COMMON_PCH_SERVER
-	def_bool n
-	depends on SOC_INTEL_COMMON_PCH_BASE
+	bool
+	select SOC_INTEL_COMMON_PCH_BASE
+	help
+	  Selected by "Server" platforms, i.e. multi-socket capable
+	  platforms used in large servers and workstations, such as
+	  those using the Lewisburg (C620) PCH.
+
+config SOC_INTEL_COMMON_PCH_BASE
+	bool
+	depends on SOC_INTEL_COMMON_BLOCK
 	help
-	  SERVER is a subset of the COMMON_PCH_BASE and limits support to
-	  server PCH devices (ex:, Intel C620 - Lewisburg).
+	  This option is meant to be selected by the specific options above.
 
 if SOC_INTEL_COMMON_PCH_BASE
 
 source "src/soc/intel/common/pch/*/Kconfig"
 
 config PCH_SPECIFIC_BASE_OPTIONS
-	# Always include the BASE (SERVER) subset of devices
 	def_bool y
 	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
 	select SOC_INTEL_COMMON_BLOCK_CSE
@@ -48,9 +52,7 @@ config PCH_SPECIFIC_BASE_OPTIONS
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
 
 config PCH_SPECIFIC_CLIENT_OPTIONS
-	# Include the CLIENT devices if this is not a SERVER
-	def_bool n if SOC_INTEL_COMMON_PCH_SERVER
-	def_bool y if !SOC_INTEL_COMMON_PCH_SERVER
+	def_bool SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_BLOCK_DSP
 	select SOC_INTEL_COMMON_BLOCK_GRAPHICS
 	select SOC_INTEL_COMMON_BLOCK_I2C
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 67445f1340..468a0baa57 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -56,7 +56,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_SMM
 	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
 	select SSE2
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 74f1eeefa8..1c6494926c 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -54,7 +54,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
 	select SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
 	select SSE2
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 074c1c7eab..e2fc4e47b5 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -57,7 +57,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_CSE_SET_EOP
 	select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index bf50ada13d..087d3cab2d 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -77,7 +77,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_BASECODE
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_COMMON_BLOCK_IOC
 	select SOC_INTEL_CSE_SET_EOP
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 0db9c5cb64..db957f2657 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -76,7 +76,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_UART
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_NHLT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 0bf5beefb7..dccec386d5 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -76,7 +76,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_FSP_RESET
-	select SOC_INTEL_COMMON_PCH_BASE
+	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
 	select SOC_INTEL_CSE_SET_EOP
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index d8c6a3911b..91b156956d 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -53,7 +53,6 @@ config	CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE
 	select SOC_INTEL_COMMON_BLOCK_SMM
 	select SOC_INTEL_COMMON_BLOCK_ACPI
-	select SOC_INTEL_COMMON_PCH_BASE
 	select SOC_INTEL_COMMON_PCH_SERVER
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select TSC_MONOTONIC_TIMER