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authorJoey Peng <joey.peng@lcfc.corp-partner.google.com>2023-04-25 15:18:00 +0800
committerNick Vaccaro <nvaccaro@google.com>2023-05-02 19:03:38 +0000
commitea2a38be323173075db3b13729a4006ea1fef72d (patch)
treeaa0a75277ab3004a626c8a8b215ef9b21abad192
parent9718e2616a2874c132da1b7c41c77b3dfec52eac (diff)
soc/intel/alderlake: Disable C1E on RPL CPUs
Since disabling C1E could improve acoustic noise for RPL, add judgement in SOC code to disable C1E on RPL CPUs and enabling it on ADL CPUs . BUG=b:278654939 TEST:emerge-brya coreboot Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com> Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74727 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
-rw-r--r--src/soc/intel/alderlake/fsp_params.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 7789cec747..d5fa51a7ab 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -1011,6 +1011,11 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
s_cfg->PkgCStateDemotion = 0;
else
s_cfg->PkgCStateDemotion = !config->disable_package_c_state_demotion;
+
+ if (cpu_id == CPUID_RAPTORLAKE_P_J0 || cpu_id == CPUID_RAPTORLAKE_P_Q0)
+ s_cfg->C1e = 0;
+ else
+ s_cfg->C1e = 1;
}
static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg,